This moves the pre-gen4 check from update() to enable(). The HAS_DDI
in the original code is not needed since only gen 2/3 have the plane
swapping code.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_fbc.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 7f54b6f..47862c5 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -563,6 +563,8 @@ static bool crtc_can_fbc(struct intel_crtc *crtc)
if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
return crtc->pipe == PIPE_A;
+ else if (INTEL_INFO(dev_priv)->gen < 4)
+ return crtc->plane == PLANE_A;
else
return true;
}
@@ -839,12 +841,6 @@ static void __intel_fbc_update(struct intel_crtc *crtc)
goto out_disable;
}
- if ((INTEL_INFO(dev_priv)->gen < 4 || HAS_DDI(dev_priv)) &&
- crtc->plane != PLANE_A) {
- set_no_fbc_reason(dev_priv, "FBC unsupported on plane");
- goto out_disable;
- }
-
/* The use of a CPU fence is mandatory in order to detect writes
* by the CPU to the scanout and trigger updates to the FBC.
*/
--
2.6.1
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