Hello
This series has two main goals:
- Simplify FBC handling so we don't recompute state or disable+reenable when
it's not necessary.
- Solve the CFB race we have that make it possible for the hardware to use the
CFB even after we free its drm_mm node.
Of course we can always do more and more code reworks, but this series kills the
last real bugs I can see on HSW+, so it will be time to consider enabling FBC on
these platforms after we merge the series.
Thanks,
Paulo
Paulo Zanoni (18):
drm/i915: change no_fbc_reason from enum to string
drm/i915: don't stop+start FBC at every flip
drm/i915: only nuke FBC when a drawing operation triggers a flush
drm/i915: extract crtc_is_valid() on the FBC code
drm/i915: set dev_priv->fbc.crtc before scheduling the enable work
drm/i915: use struct intel_crtc *crtc at __intel_fbc_update()
drm/i915: fix the __intel_fbc_update() comments
drm/i915: pass the crtc as an argument to intel_fbc_update()
drm/i915: don't disable_fbc() if FBC is already disabled
drm/i915: introduce is_active/activate/deactivate to the FBC
terminology
drm/i915: refactor FBC deactivation at init
drm/i915: introduce intel_fbc_{enable,disable}
drm/i915: remove too-frequent FBC debug message
drm/i915: fix the CFB size check
drm/i915: alloc/free the FBC CFB during enable/disable
drm/i915: move adjusted_mode checks from fbc_update to fbc_enable
drm/i915: move clock frequency checks from fbc_update to fbc_enable
drm/i915: check for FBC planes in the same place as the pipes
drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
drivers/gpu/drm/i915/i915_drv.h | 32 +-
drivers/gpu/drm/i915/i915_reg.h | 3 +
drivers/gpu/drm/i915/intel_display.c | 25 +-
drivers/gpu/drm/i915/intel_drv.h | 9 +-
drivers/gpu/drm/i915/intel_fbc.c | 715 ++++++++++++++++++-------------
drivers/gpu/drm/i915/intel_frontbuffer.c | 1 +
drivers/gpu/drm/i915/intel_pm.c | 2 +-
8 files changed, 447 insertions(+), 344 deletions(-)
--
2.6.1
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