Re: [PATCH] drm/i915: Handle HPD when it has actually occurred

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On Wed, 08 Jul 2015, Daniel Vetter <daniel@xxxxxxxx> wrote:
> On Wed, Jul 08, 2015 at 05:07:47PM +0530, Sonika Jindal wrote:
>> Writing to PCH_PORT_HOTPLUG for each interrupt is not required.
>> Handle it only if hpd has actually occurred like we handle other
>> interrupts.
>> v2: Make few variables local to if block (Ville)
>> v3: Add check for ibx/cpt both (Ville).
>>     While at it, remove the redundant check for hotplug_trigger from
>>     pch_get_hpd_pins
>> v4: Indentation (Ville)
>> 
>> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>> Signed-off-by: Sonika Jindal <sonika.jindal@xxxxxxxxx>
>
> Queued for -next, thanks for the patch.

This patch, i.e.

commit aaf5ec2e51ab1d9c5e962b4728a1107ed3ff7a3e
Author: Sonika Jindal <sonika.jindal@xxxxxxxxx>
Date:   Wed Jul 8 17:07:47 2015 +0530

    drm/i915: Handle HPD when it has actually occurred

causes *tons* of

[drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!

at boot. Suspiciously this happens a lot when doing native AUX on the DP
monitor.

Bug with dmesg is at https://bugs.freedesktop.org/show_bug.cgi?id=92084

BR,
Jani.


> -Daniel
>
>> ---
>>  drivers/gpu/drm/i915/i915_irq.c |   32 +++++++++++++++++---------------
>>  1 file changed, 17 insertions(+), 15 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> index a6fbe64..a897f68 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -1266,9 +1266,6 @@ static void pch_get_hpd_pins(u32 *pin_mask, u32 *long_mask,
>>  	*pin_mask = 0;
>>  	*long_mask = 0;
>>  
>> -	if (!hotplug_trigger)
>> -		return;
>> -
>>  	for_each_hpd_pin(i) {
>>  		if ((hpd[i] & hotplug_trigger) == 0)
>>  			continue;
>> @@ -1658,14 +1655,17 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
>>  	struct drm_i915_private *dev_priv = dev->dev_private;
>>  	int pipe;
>>  	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
>> -	u32 dig_hotplug_reg;
>> -	u32 pin_mask, long_mask;
>>  
>> -	dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
>> -	I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
>> +	if (hotplug_trigger) {
>> +		u32 dig_hotplug_reg, pin_mask, long_mask;
>>  
>> -	pch_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger, dig_hotplug_reg, hpd_ibx);
>> -	intel_hpd_irq_handler(dev, pin_mask, long_mask);
>> +		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
>> +		I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
>> +
>> +		pch_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
>> +				 dig_hotplug_reg, hpd_ibx);
>> +		intel_hpd_irq_handler(dev, pin_mask, long_mask);
>> +	}
>>  
>>  	if (pch_iir & SDE_AUDIO_POWER_MASK) {
>>  		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK) >>
>> @@ -1757,14 +1757,16 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
>>  	struct drm_i915_private *dev_priv = dev->dev_private;
>>  	int pipe;
>>  	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
>> -	u32 dig_hotplug_reg;
>> -	u32 pin_mask, long_mask;
>>  
>> -	dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
>> -	I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
>> +	if (hotplug_trigger) {
>> +		u32 dig_hotplug_reg, pin_mask, long_mask;
>>  
>> -	pch_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger, dig_hotplug_reg, hpd_cpt);
>> -	intel_hpd_irq_handler(dev, pin_mask, long_mask);
>> +		dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
>> +		I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
>> +		pch_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
>> +				 dig_hotplug_reg, hpd_cpt);
>> +		intel_hpd_irq_handler(dev, pin_mask, long_mask);
>> +	}
>>  
>>  	if (pch_iir & SDE_AUDIO_POWER_MASK_CPT) {
>>  		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK_CPT) >>
>> -- 
>> 1.7.10.4
>> 
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
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