On Fri, Sep 25, 2015 at 02:33:41PM +0100, Arun Siluvery wrote:
> It is also applicable for B0.
>
> Signed-off-by: Arun Siluvery <arun.siluvery@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 9151a2b..be39f7ad 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -121,8 +121,10 @@ static void bxt_init_clock_gating(struct drm_device *dev)
> gen9_init_clock_gating(dev);
>
> /* WaDisableSDEUnitClockGating:bxt */
> - I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> - GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> + if (INTEL_REVID(dev) >= BXT_REVID_A0) {
I don't see a point in such a check. We don't have anything older than A
stepping anyway, so this will always be true.
Also BSpec says it's FROM_A0, w/a database says UNTIL_A0. Would be nice
to know which is correct...
> + I915_WRITE(GEN8_UCGCTL6, (I915_READ(GEN8_UCGCTL6) |
> + GEN8_SDEUNIT_CLOCK_GATE_DISABLE));
> + }
>
> /* WaSetHDCunitClckGatingDisable:bxt */
> /* WaSetHdcUnitClockGatingDisableInUcgctl6:bxt */
> --
> 1.9.1
>
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--
Ville Syrjälä
Intel OTC
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