This patch series has the changes done to redesign the dmc firmware loading flow. This is continuation of the below patch series after addressing review comments from Daniel. v1: http://lists.freedesktop.org/archives/intel-gfx/2015-August/072921.html v2: - After rebasing based on below patch series. http://lists.freedesktop.org/archives/intel-gfx/2015-August/072870.html - Two more patches added in this patch series from older patch series. http://lists.freedesktop.org/archives/intel-gfx/2015-July/071163.html Animesh Manna (5): drm/i915/gen9: csr_init after runtime pm enable drm/i915/bxt: release rpm reference if csr firmware failed to load. drm/i915/gen9: Use flush_work to synchronize with dmc loader drm/i915/skl: Removed assert for csr-fw-loading check during disabling dc6 drm/i915/gen9: Corrected the sanity check of mmio address range for csr. Daniel Vetter (9): drm/i915: use correct power domain for csr loading drm/i915/gen9: move assert_csr_loaded into intel_rpm.c drm/i915/gen9: Remove csr.state, csr_lock and related code. drm/i915/gen9: Align line continuations in intel_csr.c. drm/i915/gen9: Simplify csr loading failure printing. drm/i915/gen9: extract parse_csr_fw drm/i915/gen9: Don't try to load garbage dmc firmware on resume drm/i915/gen9: Use dev_priv in csr functions drm/i915: Use request_firmware and our own async work drivers/gpu/drm/i915/i915_dma.c | 11 +- drivers/gpu/drm/i915/i915_drv.c | 39 +----- drivers/gpu/drm/i915/i915_drv.h | 12 +- drivers/gpu/drm/i915/i915_reg.h | 16 +++ drivers/gpu/drm/i915/intel_csr.c | 211 ++++++++++++-------------------- drivers/gpu/drm/i915/intel_drv.h | 10 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 26 ++-- 7 files changed, 114 insertions(+), 211 deletions(-) -- 2.0.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
