This is done through pre_disable_primary and hsw_disable_ips.
They're both set on the same conditions, so leave the check of
disable_ips in pre_disable_primary.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/intel_display.c | 16 +---------------
drivers/gpu/drm/i915/intel_drv.h | 1 -
2 files changed, 1 insertion(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index af0bcfee4771..b01e89487784 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4790,9 +4790,6 @@ static void intel_pre_plane_update(struct intel_crtc *crtc)
if (atomic->disable_fbc)
intel_fbc_disable_crtc(crtc);
- if (crtc->atomic.disable_ips)
- hsw_disable_ips(crtc);
-
if (atomic->pre_disable_primary)
intel_pre_disable_primary(&crtc->base);
@@ -11726,19 +11723,8 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
intel_crtc->atomic.pre_disable_primary = turn_off;
intel_crtc->atomic.post_enable_primary = turn_on;
- if (turn_off) {
- /*
- * FIXME: Actually if we will still have any other
- * plane enabled on the pipe we could let IPS enabled
- * still, but for now lets consider that when we make
- * primary invisible by setting DSPCNTR to 0 on
- * update_primary_plane function IPS needs to be
- * disable.
- */
- intel_crtc->atomic.disable_ips = true;
-
+ if (turn_off)
intel_crtc->atomic.disable_fbc = true;
- }
/*
* FBC does not work on some platforms for rotated
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 3b00d00c0bc0..379485f744ef 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -493,7 +493,6 @@ struct intel_crtc_atomic_commit {
/* Sleepable operations to perform before commit */
bool wait_for_flips;
bool disable_fbc;
- bool disable_ips;
bool disable_cxsr;
bool pre_disable_primary;
bool update_wm_pre, update_wm_post;
--
2.1.0
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