This fixes kms_universal_plane.universal-plane-pipe-A-functional.
IPS gets enabled even though the primary plane is disabled. This is
not supported, and results in warnings like below:
------------[ cut here ]------------
WARNING: CPU: 0 PID: 1707 at drivers/gpu/drm/i915/intel_display.c:1354
assert_plane.constprop.66+0x70/0xa0 [i915]()
plane A assertion failure (expected on, current off)
Modules linked in: i915
CPU: 0 PID: 1707 Comm: kms_universal_p Tainted: G W
4.2.0-rc2-patser+ #4288
Hardware name: NUC5i7RYB,
BIOS RYBDWi35.86A.0246.2015.0309.1355 03/09/2015
ffffffffc01d3278 ffff8800ccc37c88 ffffffff816f6e74 0000000080000000
ffff8800ccc37cd8 ffff8800ccc37cc8 ffffffff8107bfe1 ffff8800ccc37ca8
0000000000000000 ffff880117aa4520 ffff8800d7435388 ffff8800d5170000
Call Trace:
[<ffffffff816f6e74>] dump_stack+0x4f/0x7b
[<ffffffff8107bfe1>] warn_slowpath_common+0x81/0xc0
[<ffffffff8107c061>] warn_slowpath_fmt+0x41/0x50
[<ffffffffc016a270>] assert_plane.constprop.66+0x70/0xa0 [i915]
[<ffffffffc0173510>] hsw_enable_ips+0x50/0x150 [i915]
[<ffffffffc0128a63>] display_crc_ctl_write+0x623/0xbf0 [i915]
[<ffffffff81192153>] __vfs_write+0x23/0xe0
[<ffffffff81195334>] ? __sb_start_write+0x44/0xf0
[<ffffffff81277718>] ? security_file_permission+0x38/0xc0
[<ffffffff81192b34>] vfs_write+0xa4/0x190
[<ffffffff810d73de>] ? do_setitimer+0x12e/0x220
[<ffffffff81193741>] SyS_write+0x41/0xa0
[<ffffffff816fdad7>] entry_SYSCALL_64_fastpath+0x12/0x6a
---[ end trace 264b7f8804a754c3 ]---
This can be fixed easily by checking primary->visible.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/i915_debugfs.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index caf1382116de..9abf70cb3525 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3799,7 +3799,13 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe,
* user space can't make reliable use of the CRCs, so let's just
* completely disable it.
*/
- hsw_disable_ips(crtc);
+
+ if (HAS_IPS(dev) && pipe == PIPE_A) {
+ drm_modeset_lock(&crtc->base.primary->mutex, NULL);
+ if (to_intel_plane_state(crtc->base.primary->state)->visible)
+ hsw_disable_ips(crtc);
+ drm_modeset_unlock(&crtc->base.primary->mutex);
+ }
spin_lock_irq(&pipe_crc->lock);
kfree(pipe_crc->entries);
@@ -3843,8 +3849,12 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe,
vlv_undo_pipe_scramble_reset(dev, pipe);
else if (IS_HASWELL(dev) && pipe == PIPE_A)
hsw_undo_trans_edp_pipe_A_crc_wa(dev);
-
- hsw_enable_ips(crtc);
+ else if (HAS_IPS(dev) && pipe == PIPE_A) {
+ drm_modeset_lock(&crtc->base.primary->mutex, NULL);
+ if (to_intel_plane_state(crtc->base.primary->state)->visible)
+ hsw_enable_ips(crtc);
+ drm_modeset_unlock(&crtc->base.primary->mutex);
+ }
}
return 0;
--
2.1.0
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