On pe, 2015-08-14 at 14:12 +0100, Chris Wilson wrote: > On Fri, Aug 14, 2015 at 03:38:56PM +0300, Imre Deak wrote: > > By running igt/store_dword_loop_render on BXT we can hit a coherency > > problem where the seqno written at GPU command completion time is not > > seen by the CPU. This results in __i915_wait_request seeing the stale > > seqno and not completing the request (not considering the lost > > interrupt/GPU reset mechanism). I also verified that this isn't a case > > of a lost interrupt, or that the command didn't complete somehow: when > > the coherency issue occured I read the seqno via an uncached GTT mapping > > too. While the cached version of the seqno still showed the stale value > > the one read via the uncached mapping was the correct one. > > > > Work around this issue by clflushing the corresponding CPU cacheline > > following any store of the seqno and preceding any reading of it. When > > reading it do this only when the caller expects a coherent view. > > > > v2: > > - fix using the proper logical && instead of a bitwise & (Jani, Mika) > > - limit the workaround to A stepping, on later steppings this HW issue > > is fixed > > We have vfuncs in order to avoid the pointer dance (and boy is it a > pretty and quite convoluted dance). Ok, I'll add new get_seqno/set_seqno vfuncs. > -Chris > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
