Re: [PATCH v6 08/19] drm/i915/gen8: Add 4 level switching infrastructure and lrc support

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On 7/30/2015 5:14 AM, Goel, Akash wrote:
On 7/29/2015 9:53 PM, Michel Thierry wrote:
@@ -1512,12 +1522,15 @@ static int gen8_emit_bb_start(struct
drm_i915_gem_request *req,
       * Ideally, we should set Force PD Restore in ctx descriptor,
       * but we can't. Force Restore would be a second option, but
       * it is unsafe in case of lite-restore (because the ctx is
-     * not idle). */
+     * not idle). PML4 is allocated during ppgtt init so this is
+     * not needed in 48-bit.*/
      if (req->ctx->ppgtt &&
          (intel_ring_flag(req->ring) &
req->ctx->ppgtt->pd_dirty_rings)) {
-        ret = intel_logical_ring_emit_pdps(req);
-        if (ret)
-            return ret;
+        if (GEN8_CTX_ADDRESSING_MODE(req->i915) == LEGACY_32B_CONTEXT) {
Sorry for the late comment.
For consistency, better to use 'USES_FULL_48BIT_PPGTT' macro only here,
as that will also imply the same thing i.e. which type of Context
addressing mode is being used.

Best regards
Akash


Ack. I'm changing it to  if (!USES_FULL_48BIT_PPGTT(req->i915)).
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