On Wed, Jul 15, 2015 at 08:50:44AM +0100, Chris Wilson wrote: > Since the hardware sometimes mysteriously totally flummoxes the 64bit > read of a 64bit register when read using a single instruction, split the > read into two instructions. Since the read here is of automatically > incrementing timestamp counters, we also have to be very careful in > order to make sure that it does not increment between the two > instructions. > > The phenomen was first observed on a 32bit system which offset the value > by 32bits, but recently even 64bit Haswell systems have been > demonstrated to return complete garbage instead. > > Reported-by: Karol Herbst <freedesktop@xxxxxxxxxxxxxx> > Tested-by: Karol Herbst <freedesktop@xxxxxxxxxxxxxx> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91317 > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: stable@xxxxxxxxxxxxxxx It should be noted that earlier attempts tried to workaround broken userspace code in beignet that tried to utilise the broken reads. However, as this aptly demonstrates the result can be truly random and it was silly to even try and workaround such damage. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
