On Tue, May 12, 2015 at 05:20:40PM +0300, Jani Nikula wrote:
> From: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx>
>
> For MIPI panels requiring higher DSI clk, values needs to be added
> in lfsr_converts table for getting the correct values of pll ctrl
> and dividor values which gets programmed in cck regs, otherwise DSI
> PLL does not get locked leading to no display on the MIPI panel.
>
> Signed-off-by: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_dsi_pll.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
> index effb561e00a0..d1aefc7a0629 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
> @@ -67,8 +67,8 @@ struct dsi_mnp {
> static const u32 lfsr_converts[] = {
> 426, 469, 234, 373, 442, 221, 110, 311, 411, /* 62 - 70 */
> 461, 486, 243, 377, 188, 350, 175, 343, 427, 213, /* 71 - 80 */
> - 106, 53, 282, 397, 354, 227, 113, 56, 284, 142, /* 81 - 90 */
> - 71, 35 /* 91 - 92 */
> + 106, 53, 282, 397, 454, 227, 113, 56, 284, 142, /* 81 - 90 */
> + 71, 35, 273, 136, 324, 418, 465, 488, 500, 506 /* 91 - 100 */
I've never seen any details about this lfsr in any docs. However this is
actually a subset of mdfld_m_converts[] in gma500, so based on that:
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> };
>
> #ifdef DSI_CLK_FROM_RR
> --
> 2.1.4
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
