On Tue, Apr 07, 2015 at 03:28:46PM -0700, Chandra Konduru wrote: > This patch enables skylake primary plane scaling using shared > scalers atomic desgin. > > v2: > -use single copy of scaler limits (Matt) > > v3: > -move detach_scalers to crtc commit path (Matt) > -use values in plane_state->src as regular integers (me) > > v4: > -changes to align with updated scaler structures (Matt, me) > -keep plane src rect in 16.16 format (Matt, Daniel) > > Signed-off-by: Chandra Konduru <chandra.konduru@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_atomic.c | 5 +- > drivers/gpu/drm/i915/intel_display.c | 96 ++++++++++++++++++++++++++++++++-- > drivers/gpu/drm/i915/intel_drv.h | 1 + > drivers/gpu/drm/i915/intel_sprite.c | 9 ++++ > 4 files changed, 105 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c > index 2fc04ec..8f759c6 100644 > --- a/drivers/gpu/drm/i915/intel_atomic.c > +++ b/drivers/gpu/drm/i915/intel_atomic.c > @@ -167,7 +167,7 @@ int intel_atomic_commit(struct drm_device *dev, > plane->state->state = NULL; > } > > - /* swap crtc_state */ > + /* swap crtc_scaler_state */ > for (i = 0; i < dev->mode_config.num_crtc; i++) { > struct drm_crtc *crtc = state->crtcs[i]; > if (!crtc) { > @@ -176,6 +176,9 @@ int intel_atomic_commit(struct drm_device *dev, > > to_intel_crtc(crtc)->config->scaler_state = > to_intel_crtc_state(state->crtc_states[i])->scaler_state; > + > + if (INTEL_INFO(dev)->gen >= 9) > + skl_detach_scalers(to_intel_crtc(crtc)); > } > > drm_atomic_helper_commit_planes(dev, state); > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index aa4da1f..c7ee232 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2978,6 +2978,14 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc, And one real piece of review feedback: This function is now definitely too long. Same holds for the sprite update function below. Can you (or Sonika) please follow up with a few patches to extract subroutines to make this a bit easier to read? Thanks, Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx