On Tue, Apr 07, 2015 at 03:23:08PM +0300, Joonas Lahtinen wrote:
> static void
> +test_huge_bo(int fd)
> +{
> + uint32_t bo;
> + char *ptr_cpu;
> + char *ptr_gtt;
> + char *cpu_pattern;
> + uint64_t mappable_aperture_pages = gem_mappable_aperture_size() /
> + PAGE_SIZE;
> + uint64_t huge_object_size = (mappable_aperture_pages + 1) * PAGE_SIZE;
> + uint64_t last_offset = huge_object_size - PAGE_SIZE;
> +
> + cpu_pattern = malloc(PAGE_SIZE);
> + igt_assert(cpu_pattern);
> + memset(cpu_pattern, 0xaa, PAGE_SIZE);
> +
> + bo = gem_create(fd, huge_object_size);
> +
> + ptr_cpu = gem_mmap__cpu(fd, bo, 0, huge_object_size,
> + PROT_READ | PROT_WRITE);
> + if (!ptr_cpu) {
> + igt_warn("Not enough free memory for huge BO test!\n");
> + goto out;
> + }
Should be a set-domain(CPU, CPU) here.
> + /* Test read/write to first/last page with CPU. */
> + memcpy(ptr_cpu, cpu_pattern, PAGE_SIZE);
> + igt_assert(memcmp(ptr_cpu, cpu_pattern, PAGE_SIZE) == 0);
> +
> + memcpy(ptr_cpu + last_offset, cpu_pattern, PAGE_SIZE);
> + igt_assert(memcmp(ptr_cpu + last_offset, cpu_pattern, PAGE_SIZE) == 0);
> +
> + igt_assert(memcmp(ptr_cpu, ptr_cpu + last_offset, PAGE_SIZE) == 0);
> +
> + munmap(ptr_cpu, huge_object_size);
> + ptr_cpu = NULL;
> +
> + ptr_gtt = gem_mmap__gtt(fd, bo, huge_object_size,
> + PROT_READ | PROT_WRITE);
> + if (!ptr_gtt) {
> + igt_debug("Huge BO GTT mapping not supported!\n");
> + goto out;
> + }
> +
> + /* Test read/write to first/last page through GTT. */
> + set_domain(fd, bo);
> +
> + igt_assert(memcmp(ptr_gtt, cpu_pattern, PAGE_SIZE) == 0);
> + igt_assert(memcmp(ptr_gtt + last_offset, cpu_pattern, PAGE_SIZE) == 0);
> +
> + memset(ptr_gtt, 0x55, PAGE_SIZE);
> + igt_assert(memcmp(ptr_gtt + last_offset, cpu_pattern, PAGE_SIZE) == 0);
> +
> + memset(ptr_gtt + last_offset, 0x55, PAGE_SIZE);
> + igt_assert(memcmp(ptr_gtt, ptr_gtt + last_offset, PAGE_SIZE) == 0);
> +
> + munmap(ptr_gtt, huge_object_size);
And repeat the CPU sanity check (for 0x55). Perhaps using pread this time.
And tiling checks.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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