Re: [PATCH] drm/i915: Do not set L3-LLC Coherency bit in ctx descriptor

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Arun Siluvery <arun.siluvery@xxxxxxxxxxxxxxx> writes:

> According to Spec this is a reserved bit for Gen9+ and should not be set.
>
> Change-Id: I0215fb7057b94139b7a2f90ecc7a0201c0c93ad4
> Signed-off-by: Arun Siluvery <arun.siluvery@xxxxxxxxxxxxxxx>
> ---

Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>

>  drivers/gpu/drm/i915/intel_lrc.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 1c3834fc..cfc73ea 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -265,7 +265,8 @@ static uint64_t execlists_ctx_descriptor(struct intel_engine_cs *ring,
>  
>  	desc = GEN8_CTX_VALID;
>  	desc |= LEGACY_CONTEXT << GEN8_CTX_MODE_SHIFT;
> -	desc |= GEN8_CTX_L3LLC_COHERENT;
> +	if (IS_GEN8(ctx_obj->base.dev))
> +		desc |= GEN8_CTX_L3LLC_COHERENT;
>  	desc |= GEN8_CTX_PRIVILEGE;
>  	desc |= lrca;
>  	desc |= (u64)intel_execlists_ctx_id(ctx_obj) << GEN8_CTX_ID_SHIFT;
> -- 
> 2.3.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
http://lists.freedesktop.org/mailman/listinfo/intel-gfx





[Index of Archives]     [Linux USB Devel]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]
  Powered by Linux