On Wed, 2015-04-01 at 11:31 +0300, Ville Syrjälä wrote: > On Tue, Mar 31, 2015 at 04:03:21PM -0700, Rodrigo Vivi wrote: > > Program the default initial value of the L3SqcReg1 on BDW for performance > > > > v2: Default confirmed and using intel_ring_emit_wa as Mika pointed out. > > > > v3: Spec shows now a different value. It tells us to set to 0x784000 > > instead the 0x610000 that is there already. > > Also rebased after a long time so using WA_WRITE now. > > Told you so ;) > > http://lists.freedesktop.org/archives/intel-gfx/2014-September/052999.html ops, sorry! but now BSpec is updated at least... So rv-b? :) > > > > > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > > drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++ > > 2 files changed, 6 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index 7e1a0fd9..7f8b69a 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -5325,6 +5325,9 @@ enum skl_disp_power_wells { > > #define GEN7_L3SQCREG1 0xB010 > > #define VLV_B0_WA_L3SQCREG1_VALUE 0x00D30000 > > > > +#define GEN8_L3SQCREG1 0xB100 > > +#define BDW_WA_L3SQCREG1_DEFAULT 0x784000 > > + > > #define GEN7_L3CNTLREG1 0xB01C > > #define GEN7_WA_FOR_GEN7_L3_CONTROL 0x3C47FF8C > > #define GEN7_L3AGDIS (1<<19) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > > index abe062a..c02fccc 100644 > > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > > @@ -853,6 +853,9 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring) > > GEN6_WIZ_HASHING_MASK, > > GEN6_WIZ_HASHING_16x4); > > > > + /* WaProgramL3SqcReg1Default:bdw */ > > + WA_WRITE(GEN8_L3SQCREG1, BDW_WA_L3SQCREG1_DEFAULT); > > + > > return 0; > > } > > > > -- > > 2.1.0 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
