> -----Original Message-----
> From: Roper, Matthew D
> Sent: Tuesday, March 24, 2015 10:14 PM
> To: Konduru, Chandra
> Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; Vetter, Daniel; Conselvan De Oliveira, Ander
> Subject: Re: [PATCH 07/21 v2] drm/i915: Helper function to update skylake
> scaling ratio.
>
> On Fri, Mar 20, 2015 at 05:04:28PM -0700, Chandra Konduru wrote:
> > Helper function updates supported scaling ratios based on cdclk and
> > crtc clocks.
> >
> > v2:
> > -update single copy of scaling ratios (Matt)
> >
> > Signed-off-by: Chandra Konduru <chandra.konduru@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 25 +++++++++++++++++++++++++
> > 1 file changed, 25 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 20f13c8..890d372 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -4513,6 +4513,31 @@ static void
> haswell_mode_set_planes_workaround(struct intel_crtc *crtc)
> > intel_wait_for_vblank(dev, other_active_crtc->pipe); }
> >
> > +static void skl_update_scaling_ratio(struct drm_device *dev,
> > + struct intel_crtc_state *crtc_state) {
> > + struct drm_i915_private *dev_priv = dev->dev_private;
> > + uint32_t crtc_clock, cdclk;
> > + struct intel_crtc_scaler_state *scaler_state;
> > +
> > + if (!crtc_state)
> > + return;
> > +
> > + crtc_clock = (uint32_t) crtc_state->base.adjusted_mode.crtc_clock;
> > + cdclk = (uint32_t) intel_ddi_get_cdclk_freq(dev_priv);
> > +
> > + if (!crtc_clock || !cdclk)
> > + return;
> > +
> > + scaler_state = &crtc_state->scaler_state;
> > + scaler_state->min_hsr = max(scaler_state->min_hsr, (crtc_clock *
> 100)/cdclk);
> > + scaler_state->min_vsr = max(scaler_state->min_hsr, (crtc_clock *
> > +100)/cdclk);
>
> I don't have access to the bspec at the moment, but this seems a little
> strange...the minimums here can go up when you change mode, but they can
> never go back down again, even if you go back to the original mode?
> It feels like the first parameter to max() here should have been a constant for
> the lowest min the hardware can support.
You are right, I also found that while testing nv12 feature that they aren't
going back. Will fix and send revised patch.
>
> > + scaler_state->min_hvsr = max(scaler_state->min_hsr, (crtc_clock *
> > +100)/cdclk);
> ^^^^^^^
> min_hvsr?
Will fix along with above.
>
>
> > +
> > + DRM_DEBUG_KMS("for crtc_state = %p crtc_clock = %d cdclk = %d\n",
> crtc_state,
> > + crtc_clock, cdclk);
> > +}
> > +
> > static void haswell_crtc_enable(struct drm_crtc *crtc) {
> > struct drm_device *dev = crtc->dev;
> > --
> > 1.7.9.5
> >
>
> --
> Matt Roper
> Graphics Software Engineer
> IoTG Platform Enabling & Development
> Intel Corporation
> (916) 356-2795
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