On Tue, 20 Jan 2015, Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> wrote: > BDW with PCI-IDs ended in "2" aren't ULT, but HALO. > Let's fix it and at least allow VGA to work on this units. > > v2: forgot ammend and v1 doesn't compile > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87220 > Cc: Xion Zhang <xiong.y.zhang@xxxxxxxxx> > Cc: Guo Jinxian <jinxianx.guo@xxxxxxxxx> > Cc: Jani Nikula <jani.nikula@xxxxxxxxx> > Cc: Stable <stable@xxxxxxxxxxxxxxx> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> Pushed to drm-intel-fixes, thanks for the patch. BR, Jani. > --- > drivers/gpu/drm/i915/i915_drv.h | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 0be7d40..276320e 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2292,8 +2292,7 @@ struct drm_i915_cmd_table { > #define IS_HSW_EARLY_SDV(dev) (IS_HASWELL(dev) && \ > (INTEL_DEVID(dev) & 0xFF00) == 0x0C00) > #define IS_BDW_ULT(dev) (IS_BROADWELL(dev) && \ > - ((INTEL_DEVID(dev) & 0xf) == 0x2 || \ > - (INTEL_DEVID(dev) & 0xf) == 0x6 || \ > + ((INTEL_DEVID(dev) & 0xf) == 0x6 || \ > (INTEL_DEVID(dev) & 0xf) == 0xe)) > #define IS_BDW_GT3(dev) (IS_BROADWELL(dev) && \ > (INTEL_DEVID(dev) & 0x00F0) == 0x0020) > -- > 2.1.0 > -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
