On Tue, Dec 09, 2014 at 05:25:16PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > On CHV we sometimes see not just one but two bad CRCs. No real idea > what would cause that, but let's just throw away the second CRC as > well to gain some stability for the tests. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > lib/igt_debugfs.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c > index 0b098ee..b44333e 100644 > --- a/lib/igt_debugfs.c > +++ b/lib/igt_debugfs.c > @@ -425,8 +425,11 @@ void igt_pipe_crc_start(igt_pipe_crc_t *pipe_crc) > /* > * For some no yet identified reason, the first CRC is bonkers. So > * let's just wait for the next vblank and read out the buggy result. > + * > + * On CHV sometimes the second CRC is bonkers as well, so don't trust > + * that one either. > */ > - igt_pipe_crc_get_crcs(pipe_crc, 1, &crcs); > + igt_pipe_crc_get_crcs(pipe_crc, 2, &crcs); I wonder a bit whether we shouldn't push these vblank waits into the kernel, maybe with some comments. Wrt chv: Is this only on DP outputs? could be that the scrambler takes 2 vblanks (1 to set the bit, 1 to actually act on it) to go into the new fancy mode. -Daniel > free(crcs); > } > > -- > 2.0.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
