On Wed, Oct 29, 2014 at 11:32:33AM +0200, Ander Conselvan de Oliveira wrote:
> It is possible for a mode set to fail if there aren't shared DPLLS that
> match the new configuration requirement or other errors in clock
> computation. If that step is executed after disabling crtcs, in the
> failure case the hardware configuration is changed and needs to be
> restored. Doing those things early will allow the mode set to fail
> before actually touching the hardware.
>
> Follow up patches will convert different platforms to use the new
> infrastructure.
>
> v2: Keep pll->new_config valid only during mode set (Ville)
> Use kmemdup() in i915_shared_dpll_start_config() (Ville)
> Restore old pll config if something fails before commit (Ville)
> Don't set compute_clock hooks since dev_priv is kzalloc()'d (Ville)
>
> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@xxxxxxxxx>
Ran into a blocking question with this one, merged thus far.
> @@ -7395,6 +7456,9 @@ static int ironlake_crtc_mode_set(struct intel_crtc *crtc,
> else
> crtc->new_config->dpll_hw_state.fp1 = fp;
>
> + if (intel_crtc_to_shared_dpll(crtc))
> + intel_put_shared_dpll(crtc);
Don't we need the same fixup in intel_ddi_pll_select?
> +
> pll = intel_get_shared_dpll(crtc);
> if (pll == NULL) {
> DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
> @@ -10739,6 +10803,22 @@ static int __intel_set_mode(struct drm_crtc *crtc,
> prepare_pipes &= ~disable_pipes;
> }
>
> + if (dev_priv->display.crtc_compute_clock) {
> + unsigned clear_pipes = modeset_pipes | disable_pipes;
> +
> + ret = intel_shared_dpll_start_config(dev_priv, clear_pipes);
> + if (ret)
> + goto done;
> +
> + for_each_intel_crtc_masked(dev, modeset_pipes, intel_crtc) {
> + ret = dev_priv->display.crtc_compute_clock(intel_crtc);
> + if (ret) {
> + intel_shared_dpll_abort_config(dev_priv);
> + goto done;
> + }
> + }
> + }
Might be useful to shuffle this and the vlv-specific code above into a new
intel_compute_global_config kind of helper function. But that can be done
later on I think.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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