On Thu, Oct 30, 2014 at 04:41:36PM -0200, Paulo Zanoni wrote: > 2014-10-30 15:42 GMT-02:00 <ville.syrjala@xxxxxxxxxxxxxxx>: > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > Some has given a name for the DPINVGTT status bitmask, so let's use it > > instead of the magic number. Looks more like the chv code now. > > Notice that valleyview_irq_postinstall() contains a write using the > correct name, but it's under an "#if 0" with a FIXME comment. You > might want to audit that. Yeah, I did consider just killing that stuff since it doesn't look like anyone is ever going to do what's required there. But then I decided to leave it in for now. > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_irq.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > > index 98a8d65..e41272d 100644 > > --- a/drivers/gpu/drm/i915/i915_irq.c > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > @@ -3122,7 +3122,7 @@ static void valleyview_irq_preinstall(struct drm_device *dev) > > > > gen5_gt_irq_reset(dev); > > > > - I915_WRITE(DPINVGTT, 0xff); > > + I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK); > > > > I915_WRITE(PORT_HOTPLUG_EN, 0); > > I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT)); > > -- > > 2.0.4 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > Paulo Zanoni -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
