On Fri, Oct 24, 2014 at 02:59:44PM +0100, Gustavo Padovan wrote: > 2014-10-07 Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>: > > > On Wed, Sep 24, 2014 at 02:20:32PM -0300, Gustavo Padovan wrote: > > > From: Gustavo Padovan <gustavo.padovan@xxxxxxxxxxxxxxx> > > > > > > After some refactor intel_primary_plane_setplane() does the same > > > as intel_pipe_set_base() so we can get rid of it and replace the calls > > > with intel_primary_plane_setplane(). > > > > > > v2: take Ville's comments: > > > - get the right arguments for update_plane() > > > - use drm_crtc_get_hv_timing() > > > > > > Signed-off-by: Gustavo Padovan <gustavo.padovan@xxxxxxxxxxxxxxx> > > > --- > > > drivers/gpu/drm/i915/intel_display.c | 89 ++++++++---------------------------- > > > 1 file changed, 18 insertions(+), 71 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > > > index 9dd4952..f7c2e5f 100644 > > > --- a/drivers/gpu/drm/i915/intel_display.c > > > +++ b/drivers/gpu/drm/i915/intel_display.c > > > @@ -2857,74 +2857,6 @@ static void intel_update_pipe_size(struct intel_crtc *crtc) > > > crtc->config.pipe_src_h = adjusted_mode->crtc_vdisplay; > > > } > > > > > > -static int > > > -intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, > > > - struct drm_framebuffer *fb) > > > -{ > > > - struct drm_device *dev = crtc->dev; > > > - struct drm_i915_private *dev_priv = dev->dev_private; > > > - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > > > - enum pipe pipe = intel_crtc->pipe; > > > - struct drm_framebuffer *old_fb = crtc->primary->fb; > > > - struct drm_i915_gem_object *obj = intel_fb_obj(fb); > > > - struct drm_i915_gem_object *old_obj = intel_fb_obj(old_fb); > > > - int ret; > > > - > > > - if (intel_crtc_has_pending_flip(crtc)) { > > > - DRM_ERROR("pipe is still busy with an old pageflip\n"); > > > - return -EBUSY; > > > - } > > > - > > > - /* no fb bound */ > > > - if (!fb) { > > > - DRM_ERROR("No FB bound\n"); > > > - return 0; > > > - } > > > - > > > - if (intel_crtc->plane > INTEL_INFO(dev)->num_pipes) { > > > - DRM_ERROR("no plane for crtc: plane %c, num_pipes %d\n", > > > - plane_name(intel_crtc->plane), > > > - INTEL_INFO(dev)->num_pipes); > > > - return -EINVAL; > > > - } > > > - > > > - mutex_lock(&dev->struct_mutex); > > > - ret = intel_pin_and_fence_fb_obj(dev, obj, NULL); > > > - if (ret == 0) > > > - i915_gem_track_fb(old_obj, obj, > > > - INTEL_FRONTBUFFER_PRIMARY(pipe)); > > > - mutex_unlock(&dev->struct_mutex); > > > - if (ret != 0) { > > > - DRM_ERROR("pin & fence failed\n"); > > > - return ret; > > > - } > > > - > > > - intel_update_pipe_size(intel_crtc); > > > - > > > - dev_priv->display.update_primary_plane(crtc, fb, x, y); > > > - > > > - if (intel_crtc->active) > > > - intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_PRIMARY(pipe)); > > > - > > > - crtc->primary->fb = fb; > > > - crtc->x = x; > > > - crtc->y = y; > > > - > > > - if (old_fb) { > > > - if (intel_crtc->active && old_fb != fb) > > > - intel_wait_for_vblank(dev, intel_crtc->pipe); > > > - mutex_lock(&dev->struct_mutex); > > > - intel_unpin_fb_obj(old_obj); > > > - mutex_unlock(&dev->struct_mutex); > > > - } > > > - > > > - mutex_lock(&dev->struct_mutex); > > > - intel_update_fbc(dev); > > > - mutex_unlock(&dev->struct_mutex); > > > - > > > - return 0; > > > -} > > > - > > > static void intel_fdi_normal_train(struct drm_crtc *crtc) > > > { > > > struct drm_device *dev = crtc->dev; > > > @@ -9681,6 +9613,8 @@ static int intel_crtc_commit_page_flip(struct drm_crtc *crtc, > > > struct drm_framebuffer *old_fb = crtc->primary->fb; > > > struct drm_i915_gem_object *obj = intel_fb_obj(fb); > > > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > > > + struct drm_plane *primary = crtc->primary; > > > + struct intel_plane *intel_plane = to_intel_plane(primary); > > > enum pipe pipe = intel_crtc->pipe; > > > struct intel_unpin_work *work; > > > struct intel_engine_cs *ring; > > > @@ -9822,7 +9756,15 @@ free_work: > > > if (ret == -EIO) { > > > out_hang: > > > intel_crtc_wait_for_pending_flips(crtc); > > > - ret = intel_pipe_set_base(crtc, crtc->x, crtc->y, fb); > > > + ret = primary->funcs->update_plane(primary, crtc, fb, > > > + intel_plane->crtc_x, > > > + intel_plane->crtc_y, > > > + intel_plane->crtc_h, > > > + intel_plane->crtc_w, > > > + intel_plane->src_x, > > > + intel_plane->src_y, > > > + intel_plane->src_h, > > > + intel_plane->src_w); > > > if (ret == 0 && event) { > > > spin_lock_irq(&dev->event_lock); > > > drm_send_vblank_event(dev, pipe, event); > > > @@ -11359,11 +11301,16 @@ static int intel_crtc_set_config(struct drm_mode_set *set) > > > set->x, set->y, set->fb); > > > } else if (config->fb_changed) { > > > struct intel_crtc *intel_crtc = to_intel_crtc(set->crtc); > > > + struct drm_plane *primary = set->crtc->primary; > > > + int vdisplay, hdisplay; > > > > > > intel_crtc_wait_for_pending_flips(set->crtc); > > > > > > - ret = intel_pipe_set_base(set->crtc, > > > - set->x, set->y, set->fb); > > > + drm_crtc_get_hv_timing(set->mode, &hdisplay, &vdisplay); > > > + ret = primary->funcs->update_plane(primary, set->crtc, set->fb, > > > + 0, 0, hdisplay, vdisplay, > > > + set->x << 16, set->y << 16, > > > + hdisplay << 16, vdisplay << 16); > > > > > > > These two look like they should do the right thing. But we still have > > the mode_change==true path to worry about. If we don't call > > update_plane() there we migth never populate intel_plane->crtc_x & co. > > > > So I think you'll just need to replace the small piece of pin/unpin code > > in __intel_set_mode() with a call to update_plane(). Since the crtc is > > not active at that point it will skip the actual plane register > > programming and intel_enable_primary_hw_plane() will later do all that. > > Yes, this is a pending patch that I have here. It does exactly what you are > saying but it breaks everything. It needs more work I think, the simple > replacement by an update_plane() doesn't work. Hmm. I would have expected it to work. I think I need to change my default back to pessimism so I'll avoid being disappointed :) -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx