On Thu, Aug 21, 2014 at 10:50:38PM +0100, Damien Lespiau wrote: > On Thu, Aug 21, 2014 at 05:09:36PM -0300, Paulo Zanoni wrote: > > From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > > > Because BDW has WPT, which is equivalent to LPT. This is just like the > > CPT/PPT case. > > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > It'd be probably good to have drm/i915/bdw: in the subject to ease back > porting for product groups, and add those patches to a list someone > maintains (Rodrigo?) Forgotten your r-b tag or intentionally left blank? -Daniel > > -- > Damien > > > --- > > drivers/gpu/drm/i915/intel_pm.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > index c8f744c..b3e948f 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -5595,6 +5595,8 @@ static void gen8_init_clock_gating(struct drm_device *dev) > > /* Wa4x4STCOptimizationDisable:bdw */ > > I915_WRITE(CACHE_MODE_1, > > _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE)); > > + > > + lpt_init_clock_gating(dev); > > } > > > > static void haswell_init_clock_gating(struct drm_device *dev) > > -- > > 2.0.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
