On Mon, 18 Aug 2014, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > On VLV/CHV the panel power sequencer may need to be "kicked" a bit to > lock onto the new port, and that needs to happen before any aux > transfers are attempted if we want the aux transfers to actaully > succeed. So turn on panel power (part of the "kick") before aux > transfers (DPMS_ON + link training). > > This also matches the documented modeset sequence better for pch > platforms. The documentation doesn't explicitly state anything about the > DPMS or link training DPCD writes, but the panel power on step is > always listed before link training is mentioned. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_dp.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 4952783..28bc652 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -2275,10 +2275,10 @@ static void intel_enable_dp(struct intel_encoder *encoder) > return; > > intel_edp_panel_vdd_on(intel_dp); > - intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); > - intel_dp_start_link_train(intel_dp); > intel_edp_panel_on(intel_dp); > intel_edp_panel_vdd_off(intel_dp, true); > + intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); > + intel_dp_start_link_train(intel_dp); Please dig into the git history in this area. I fear this may regress. We've juggled this too many times... BR, Jani. > intel_dp_complete_link_train(intel_dp); > intel_dp_stop_link_train(intel_dp); > } > -- > 1.8.5.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
