[PATCH 00/14] drm/i915: edp vdd locking and prep for power sequencer kick

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From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>

While wrestling with the VLV/CHV panel power sequencer I noticed the locking
in our edp vdd code was rather broken. This series aims to fix that by
introducing a power seqeuencer mutex. I was already thinking about using the
aux.hw_mutex for this since it's already locked around the aux ->transfer()
function, but the VLV/CHV multiple power sequencer issue requires a single
lock instead of per-port.

At the end of the series there's a bit of reordering of the DP port
enable/disable sequences to make subsequent power sequencer kick patches
easier. The last patch fixes the wait_pipe_off() timeouts on my ILK.
Strictly speaking it shouldn't be part of this series, but I couldn't
really test this on my ILK without suffering tons of warnings so I
included it here anyway.

Ville Syrjälä (14):
  drm/i915: Parametrize PANEL_PORT_SELECT_VLV
  drm/i915: Reorganize vlv eDP reboot notifier
  drm/i915: Use intel_edp_panel_vdd_on() in intel_dp_probe_mst()
  drm/i915: Rename edp vdd funcs for consistency
  drm/i915: Add a note explaining vdd on/off handling in
    intel_dp_aux_ch()
  drm/i915: Replace big nested if block with early return
  drm/i915: Warn about want_panel_vdd in edp_panel_vdd_off_sync()
  drm/i915: Flatten intel_edp_panel_vdd_on()
  drm/i915: Fix edp vdd locking
  drm/i915: Track which port is using which pipe's power sequencer
  drm/i915: Be more careful when picking the initial power sequencer
    pipe
  drm/i915: Turn on panel power before doing aux transfers
  drm/i915: Enable DP port earlier
  drm/i915: Move DP port disable to post_disable for pch platforms

 drivers/gpu/drm/i915/i915_drv.h      |   3 +
 drivers/gpu/drm/i915/i915_reg.h      |   3 +-
 drivers/gpu/drm/i915/intel_display.c |   2 +
 drivers/gpu/drm/i915/intel_dp.c      | 619 +++++++++++++++++++++++++----------
 drivers/gpu/drm/i915/intel_drv.h     |   6 +
 5 files changed, 463 insertions(+), 170 deletions(-)

-- 
1.8.5.5

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