On Wed, Aug 13, 2014 at 01:32:08PM +0200, Daniel Vetter wrote: > On Wed, Aug 13, 2014 at 11:51:54AM +0100, Chris Wilson wrote: > > As we use WC updates of the PTE, we are responsible for notifying the > > hardware when to flush its TLBs. Do so after we zap all the PTEs before > > suspend (and the BIOS tries to read our GTT). > > > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Imo would make more sense to add them to the clear_range functions. They are not required in the clear_range function. Here it is only required in the i915_gem_suspend_gtt_mapping() because a third party is involved. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
