On Thu, Jul 24, 2014 at 05:04:37PM +0100, Thomas Daniel wrote:
> From: Oscar Mateo <oscar.mateo@xxxxxxxxx>
>
> Each logical ring context has the tail pointer in the context object,
> so update it before submission.
>
> v2: New namespace.
>
> Signed-off-by: Oscar Mateo <oscar.mateo@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 535ef98..5b6f416 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -176,6 +176,21 @@ static void execlists_elsp_write(struct intel_engine_cs *ring,
> gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
> }
>
> +static int execlists_ctx_write_tail(struct drm_i915_gem_object *ctx_obj, u32 tail)
> +{
> + struct page *page;
> + uint32_t *reg_state;
> +
> + page = i915_gem_object_get_page(ctx_obj, 1);
> + reg_state = kmap_atomic(page);
> +
> + reg_state[CTX_RING_TAIL+1] = tail;
> +
> + kunmap_atomic(reg_state);
> +
> + return 0;
> +}
> +
> static int execlists_submit_context(struct intel_engine_cs *ring,
> struct intel_context *to0, u32 tail0,
> struct intel_context *to1, u32 tail1)
> @@ -187,10 +202,14 @@ static int execlists_submit_context(struct intel_engine_cs *ring,
> BUG_ON(!ctx_obj0);
> BUG_ON(!i915_gem_obj_is_pinned(ctx_obj0));
>
> + execlists_ctx_write_tail(ctx_obj0, tail0);
> +
> if (to1) {
> ctx_obj1 = to1->engine[ring->id].state;
> BUG_ON(!ctx_obj1);
> BUG_ON(!i915_gem_obj_is_pinned(ctx_obj1));
> +
> + execlists_ctx_write_tail(ctx_obj1, tail1);
Ok, now I'm totally surprised - here's the tail write and elsp submit like
excepted. So why do we need the dance in the previous patch?
I'll look at this again tomorrow and will stop merging for today.
-Daniel
> }
>
> execlists_elsp_write(ring, ctx_obj0, ctx_obj1);
> --
> 1.7.9.5
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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