On Thu, Jul 24, 2014 at 05:04:32PM +0100, Thomas Daniel wrote: > From: Oscar Mateo <oscar.mateo@xxxxxxxxx> > > Dispatch_execbuffer's evil twin. > > Signed-off-by: Oscar Mateo <oscar.mateo@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_lrc.c | 28 ++++++++++++++++++++++++++++ > drivers/gpu/drm/i915/intel_ringbuffer.h | 2 ++ > 2 files changed, 30 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c > index a6dcb3a..55ee8dd 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.c > +++ b/drivers/gpu/drm/i915/intel_lrc.c > @@ -384,6 +384,29 @@ static int gen8_init_render_ring(struct intel_engine_cs *ring) > return ret; > } > > +static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf, > + u64 offset, unsigned flags) > +{ > + struct intel_engine_cs *ring = ringbuf->ring; > + struct drm_i915_private *dev_priv = ring->dev->dev_private; > + bool ppgtt = dev_priv->mm.aliasing_ppgtt != NULL && The aliasing ppgtt check here is fairly decent bullocks, especially since full ppgtt is a requirement for execlists. I've ditched it since a series from myself will otherwise break this patch. -Daniel > + !(flags & I915_DISPATCH_SECURE); > + int ret; > + > + ret = intel_logical_ring_begin(ringbuf, 4); > + if (ret) > + return ret; > + > + /* FIXME(BDW): Address space and security selectors. */ > + intel_logical_ring_emit(ringbuf, MI_BATCH_BUFFER_START_GEN8 | (ppgtt<<8)); > + intel_logical_ring_emit(ringbuf, lower_32_bits(offset)); > + intel_logical_ring_emit(ringbuf, upper_32_bits(offset)); > + intel_logical_ring_emit(ringbuf, MI_NOOP); > + intel_logical_ring_advance(ringbuf); > + > + return 0; > +} > + > static bool gen8_logical_ring_get_irq(struct intel_engine_cs *ring) > { > struct drm_device *dev = ring->dev; > @@ -615,6 +638,7 @@ static int logical_render_ring_init(struct drm_device *dev) > ring->emit_flush = gen8_emit_flush_render; > ring->irq_get = gen8_logical_ring_get_irq; > ring->irq_put = gen8_logical_ring_put_irq; > + ring->emit_bb_start = gen8_emit_bb_start; > > return logical_ring_init(dev, ring); > } > @@ -639,6 +663,7 @@ static int logical_bsd_ring_init(struct drm_device *dev) > ring->emit_flush = gen8_emit_flush; > ring->irq_get = gen8_logical_ring_get_irq; > ring->irq_put = gen8_logical_ring_put_irq; > + ring->emit_bb_start = gen8_emit_bb_start; > > return logical_ring_init(dev, ring); > } > @@ -663,6 +688,7 @@ static int logical_bsd2_ring_init(struct drm_device *dev) > ring->emit_flush = gen8_emit_flush; > ring->irq_get = gen8_logical_ring_get_irq; > ring->irq_put = gen8_logical_ring_put_irq; > + ring->emit_bb_start = gen8_emit_bb_start; > > return logical_ring_init(dev, ring); > } > @@ -687,6 +713,7 @@ static int logical_blt_ring_init(struct drm_device *dev) > ring->emit_flush = gen8_emit_flush; > ring->irq_get = gen8_logical_ring_get_irq; > ring->irq_put = gen8_logical_ring_put_irq; > + ring->emit_bb_start = gen8_emit_bb_start; > > return logical_ring_init(dev, ring); > } > @@ -711,6 +738,7 @@ static int logical_vebox_ring_init(struct drm_device *dev) > ring->emit_flush = gen8_emit_flush; > ring->irq_get = gen8_logical_ring_get_irq; > ring->irq_put = gen8_logical_ring_put_irq; > + ring->emit_bb_start = gen8_emit_bb_start; > > return logical_ring_init(dev, ring); > } > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h > index 09102b2..c885d5c 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.h > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h > @@ -228,6 +228,8 @@ struct intel_engine_cs { > int (*emit_flush)(struct intel_ringbuffer *ringbuf, > u32 invalidate_domains, > u32 flush_domains); > + int (*emit_bb_start)(struct intel_ringbuffer *ringbuf, > + u64 offset, unsigned flags); > > /** > * List of objects currently involved in rendering from the > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx