On Thu, Aug 07, 2014 at 04:07:59PM +0200, Daniel Vetter wrote: > Doing a 1s wait (tops) with the cpu is a bit excessive. Tune it down > like everything else in that code. > > Cc: Naresh Kumar Kachhi <naresh.kumar.kachhi@xxxxxxxxx> > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx> > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index 05969f03c0c1..966d8f72da45 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -476,7 +476,7 @@ static bool stop_ring(struct intel_engine_cs *ring) > > if (!IS_GEN2(ring->dev)) { > I915_WRITE_MODE(ring, _MASKED_BIT_ENABLE(STOP_RING)); > - if (wait_for_atomic((I915_READ_MODE(ring) & MODE_IDLE) != 0, 1000)) { > + if (wait_for((I915_READ_MODE(ring) & MODE_IDLE) != 0, 1000)) { > DRM_ERROR("%s :timed out trying to stop ring\n", ring->name); Please fix the "%s :timed" here as well. Ok, it seems like I only thought that wait_for_atomic was microseconds, but wait_for_atomic_us() was a whole seperate interface. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx