On Wed, Jun 11, 2014 at 03:23:33PM +0000, Mateo Lozano, Oscar wrote: > > > > - Ack the interrupt inmediately, before trying to handle it (fix for > > > > missing interrupts by Bob Beckett <robert.beckett@xxxxxxxxx>). > > > > > > This interrupt handling change is interesting since it might explain > > > our irq handling woes on gen5+ with the two-level GT interrupt handling > > scheme. > > > Can you please roll this out as a prep patch for all the existing gt > > > interrupt sources we handle already for gen5+? > > > > > > Thanks, Daniel > > > > Can do. > > One question, though: why only the GT interrupts? what about DE, PM, etc...? > > It looks like the BSpec is pretty clear on this: > > 1 - Disable Master Interrupt Control > 2 - Find the category of interrupt that is pending > 3 - Find the source(s) of the interrupt and ***clear the Interrupt Identity bits (IIR)*** > 4 - Process the interrupt(s) that had bits set in the IIRs > 5 - Re-enable Master Interrupt Control Yeah, makes sense to do it for all. When I've looked at it the funky part are the SDE interrupts where we (at least on pre-bdw) have this crazy hack. I guess at least that one we should leave in since apparently it works. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
