On Thu, Jun 05, 2014 at 07:15:52PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Certain DVO chips (ns2501 for example) don't like to be accessed unless > the PLL is running. Simply skip the DVO get_hw_state if the DVO port > is disabled. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Definitely makes sense independent of the other patches. Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/intel_dvo.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c > index a3631c0..5d7d975 100644 > --- a/drivers/gpu/drm/i915/intel_dvo.c > +++ b/drivers/gpu/drm/i915/intel_dvo.c > @@ -112,7 +112,15 @@ static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) > > static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) > { > + struct drm_device *dev = connector->base.dev; > + struct drm_i915_private *dev_priv = dev->dev_private; > struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); > + u32 tmp; > + > + tmp = I915_READ(intel_dvo->dev.dvo_reg); > + > + if (!(tmp & DVO_ENABLE)) > + return false; > > return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); > } > -- > 1.8.5.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx