On Wed, May 07, 2014 at 12:40:53AM +0300, Abdiel Janulgue wrote:
> Add test that makes sure RS bit only gets executed on BDW and
> on the render ring.
>
> Signed-off-by: Abdiel Janulgue <abdiel.janulgue@xxxxxxxxxxxxxxx>
> ---
> tests/gem_exec_params.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/tests/gem_exec_params.c b/tests/gem_exec_params.c
> index 769969d..a3f765b 100644
> --- a/tests/gem_exec_params.c
> +++ b/tests/gem_exec_params.c
> @@ -193,6 +193,17 @@ igt_main
> execbuf.num_cliprects = 0;
> }
>
> + igt_subtest("rs-not-gen8") {
> + igt_require(intel_gen(devid) != 8);
> + execbuf.flags = I915_EXEC_RENDER | I915_EXEC_RESOURCE_STREAMER;
> + RUN_FAIL(EINVAL);
> + }
> +
> + igt_subtest("invalid-rs-ring") {
> + execbuf.flags = I915_EXEC_RESOURCE_STREAMER;
> + RUN_FAIL(EINVAL);
See Chris comment, but 0 is actually _not_ an invalid ring, but aliases
RCS. Yeah, we have a fun api. So this should actually suceed, at least on
bdw (and -EINVAL everywhere else).
So you need to explicitly test with some other ring like VCS
(I915_EXEC_BSD).
-Daniel
> + }
> +
> #define DIRT(name) \
> igt_subtest(#name "-dirt") { \
> execbuf.flags = 0; \
> --
> 1.7.9.5
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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