Since the state capture happens from a deferred work, we may drop the last power domain/RPM reference since the error got triggered (from an interrupt handler for example). I hit this by writing to the i915_wedged debugfs file. Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_irq.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index b8f64d7..a586c16 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2174,6 +2174,8 @@ static void i915_error_work_func(struct work_struct *work) kobject_uevent_env(&dev->primary->kdev->kobj, KOBJ_CHANGE, reset_event); + intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); + /* * All state reset _must_ be completed before we update the * reset counter, for otherwise waiters might miss the reset @@ -2184,6 +2186,8 @@ static void i915_error_work_func(struct work_struct *work) intel_display_handle_reset(dev); + intel_display_power_put(dev_priv, POWER_DOMAIN_INIT); + if (ret == 0) { /* * After all the gem state is reset, increment the reset -- 1.8.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx