On Thu, Mar 20, 2014 at 07:54:19AM +0000, Chris Wilson wrote: > On Wed, Mar 19, 2014 at 04:06:38PM -0700, Ben Widawsky wrote: > > On Wed, Mar 19, 2014 at 09:54:48PM +0000, Chris Wilson wrote: > > > As Broadwell has an increased virtual address size, it requires more > > > than 32 bits to store offsets into its address space. This includes the > > > debug registers to track the current HEAD of the individual rings, which > > > may be anywhere within the per-process address spaces. In order to find > > > the full location, we need to read the high bits from a second register. > > > We then also need to expand our storage to keep track of the larger > > > address. > > > > > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > > Cc: Ben Widawsky <benjamin.widawsky@xxxxxxxxx> > > > Cc: Timo Aaltonen <tjaalton@xxxxxxxxxx> > > > --- > > > drivers/gpu/drm/i915/i915_drv.h | 2 +- > > > drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- > > > drivers/gpu/drm/i915/i915_irq.c | 8 +++++--- > > > drivers/gpu/drm/i915/i915_reg.h | 1 + > > > drivers/gpu/drm/i915/intel_ringbuffer.c | 21 +++++++++++++++------ > > > drivers/gpu/drm/i915/intel_ringbuffer.h | 6 +++--- > > > 6 files changed, 26 insertions(+), 14 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > > > index ed67b4abf9e3..ee913b63a945 100644 > > > --- a/drivers/gpu/drm/i915/i915_drv.h > > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > > @@ -354,12 +354,12 @@ struct drm_i915_error_state { > > > u32 ipeir; > > > u32 ipehr; > > > u32 instdone; > > > - u32 acthd; > > > u32 bbstate; > > > u32 instpm; > > > u32 instps; > > > u32 seqno; > > > u64 bbaddr; > > > + u64 acthd; > > > u32 fault_reg; > > > u32 faddr; > > > u32 rc_psmi; /* sleep state */ > > > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c > > > index b153a16ead0a..9519aa240614 100644 > > > --- a/drivers/gpu/drm/i915/i915_gpu_error.c > > > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c > > > @@ -248,7 +248,7 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m, > > > err_printf(m, " TAIL: 0x%08x\n", ring->tail); > > > err_printf(m, " CTL: 0x%08x\n", ring->ctl); > > > err_printf(m, " HWS: 0x%08x\n", ring->hws); > > > - err_printf(m, " ACTHD: 0x%08x\n", ring->acthd); > > > + err_printf(m, " ACTHD: 0x%08llx\n", ring->acthd); > > > > %016x? > > > > if (gen8) > > %016x > > ? > > I wasn't sure either, but I thought since we didn't do anything special > for BBADDR, to leave ACTHD alone. > > I wonder if it would help splitting it up, having to count 8 extra > leading zeros is going to be a nightmare (especially as the decoder > doesn't pad it right either...) > > For reading, I think I would prefer > err_printf(m, " ACTHD: 0x%016llx [0x%08x %08x]\n", > ring->acthd, (u32)(ring->acthd>>32), (u32)(ring->acthd)); > > or maybe just > err_printf(m, " ACTHD: 0x%08x %08x\n", > (u32)(ring->acthd>>32), (u32)(ring->acthd)); I expect this to lead to a day-long wtf session once we have 64b ppgtt enabled and a leaking X hung ;-) I use g* a lot in vim when reading error states, so dropping information is dangerous. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx