On Sat, Mar 08, 2014 at 11:58:16AM -0800, Ben Widawsky wrote: > I'm not clear if the hardware is still subject to the same prefetching > issues that made us use a scratch page in the first place. In either > case, we're using garbage with the current code (we will end up using > offset 0). > > This may be the cause of our current gem_cpu_reloc regression with > PPGTT. I cannot test it at the moment. > Wait NVM... that wasn't gen8. I can't associate this one with a bug. > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index 5427d6d..0f39090 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -1169,7 +1169,6 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt) > ppgtt->base.clear_range = gen6_ppgtt_clear_range; > ppgtt->base.insert_entries = gen6_ppgtt_insert_entries; > ppgtt->base.cleanup = gen6_ppgtt_cleanup; > - ppgtt->base.scratch = dev_priv->gtt.base.scratch; > ppgtt->base.start = 0; > ppgtt->base.total = GEN6_PPGTT_PD_ENTRIES * I915_PPGTT_PT_ENTRIES * PAGE_SIZE; > ppgtt->debug_dump = gen6_dump_ppgtt; > @@ -1192,6 +1191,7 @@ int i915_gem_init_ppgtt(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt) > int ret = 0; > > ppgtt->base.dev = dev; > + ppgtt->base.scratch = dev_priv->gtt.base.scratch; > > if (INTEL_INFO(dev)->gen < 8) > ret = gen6_ppgtt_init(ppgtt); > -- > 1.9.0 > -- Ben Widawsky, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
