On Wed, 12 Feb 2014 23:07:15 +0000 Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote: > On Wed, Feb 12, 2014 at 12:26:29PM -0800, Jesse Barnes wrote: > > + /* Find the largest fb */ > > + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { > > + intel_crtc = to_intel_crtc(crtc); > > + > > + if (!intel_crtc->active || !intel_crtc->plane_config.fb) { > > + DRM_DEBUG_KMS("pipe %c not active or no fb, skipping\n", > > + pipe_name(intel_crtc->pipe)); > > + continue; > > + } > > + > > + if (intel_crtc->plane_config.size > max_size) { > > + DRM_DEBUG_KMS("found possible fb from plane %c\n", > > + pipe_name(intel_crtc->pipe)); > > + plane_config = &intel_crtc->plane_config; > > + fb = plane_config->fb; > > + max_size = plane_config->size; > > + } > > + } > > I had another idea... Can you select the fb with offset 0 first and see > if that fits every pipe? That way we reduce the potential fragmentation > from the permanently pinned in-aperture object. So if they happen to be the same size we'll prefer the one at 0? I guess we can tweak this all sorts of ways... but we'll generally probably only have a single buffer from the BIOS, so I'm not sure it'll make much difference in practice. > > + > > + if (!fb) { > > + DRM_DEBUG_KMS("no active fbs found, not using BIOS config\n"); > > + goto out; > > + } > > + > > + /* Now make sure all the pipes will fit into it */ > > + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { > > + unsigned int cur_size; > > + > > + intel_crtc = to_intel_crtc(crtc); > > + > > + if (!intel_crtc->active) { > > + DRM_DEBUG_KMS("pipe %c not active, skipping\n", > > + pipe_name(intel_crtc->pipe)); > > + continue; > > + } > > + > > + DRM_DEBUG_KMS("checking plane %c for BIOS fb\n", > > + pipe_name(intel_crtc->pipe)); > > + > > + /* > > + * See if the plane fb we found above will fit on this > > + * pipe. Note we need to use the selected fb's bpp rather > > + * than the current pipe's, since they could be different. > > + */ > > + cur_size = intel_crtc->config.adjusted_mode.crtc_hdisplay * > > + intel_crtc->config.adjusted_mode.crtc_vdisplay; > > + DRM_DEBUG_KMS("pipe %c area: %d\n", pipe_name(intel_crtc->pipe), > > + cur_size); > > + cur_size *= fb->base.bits_per_pixel / 8; > > + DRM_DEBUG_KMS("total size %d (bpp %d)\n", cur_size, > > + fb->base.bits_per_pixel / 8); > > But the display hardware will be using the stride from the fb, so the > end of the last row will still be vdisplay*fb->stride, right? Unless the > fb pitch itself is recomputed to match? I think there are two cases: 1) pipe A re-uses plane A's fb - no changes needed, should match nicely 2) pipe B switches to plane A's fb - we'll end up doing a set_base and switching the stride bits and depth over to the plane A fb params, so it should work right? -- Jesse Barnes, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx