Future platform require the phy input to determine which PHY to target for.
Signed-off-by: Chon Ming Lee <chon.ming.lee@xxxxxxxxx>
---
lib/intel_iosf.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/lib/intel_iosf.c b/lib/intel_iosf.c
index f57212f..0c9f4d8 100644
--- a/lib/intel_iosf.c
+++ b/lib/intel_iosf.c
@@ -74,15 +74,26 @@ int intel_nc_write(uint8_t addr, uint32_t val)
return vlv_sideband_rw(IOSF_PORT_NC, PUNIT_OPCODE_REG_WRITE, addr, &val);
}
+static int get_dpio_port(int phy)
+{
+ struct pci_device *dev = intel_get_pci_device();
+ int dpio_port;
+
+ if (IS_VALLEYVIEW(dev->device_id))
+ dpio_port = IOSF_PORT_DPIO;
+
+ return dpio_port;
+}
+
uint32_t intel_dpio_reg_read(uint32_t reg, int phy)
{
uint32_t val;
- vlv_sideband_rw(IOSF_PORT_DPIO, DPIO_OPCODE_REG_READ, reg, &val);
+ vlv_sideband_rw(get_dpio_port(phy), DPIO_OPCODE_REG_READ, reg, &val);
return val;
}
void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy)
{
- vlv_sideband_rw(IOSF_PORT_DPIO, DPIO_OPCODE_REG_WRITE, reg, &val);
+ vlv_sideband_rw(get_dpio_port(phy), DPIO_OPCODE_REG_WRITE, reg, &val);
}
--
1.8.3.1
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