On 1/17/2014 8:08 AM, Damien Lespiau wrote:
On Fri, Jan 17, 2014 at 07:58:58AM -0700, Todd Previte wrote:
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7df5085..f92d1c0 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -102,7 +102,10 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp)
case DP_LINK_BW_2_7:
break;
case DP_LINK_BW_5_4: /* 1.2 capable displays may advertise higher bw */
- max_link_bw = DP_LINK_BW_2_7;
+ if (intel_dp->dpcd[DP_DPCD_REV] == 0x12)
+ max_link_bw = DP_LINK_BW_5_4;
+ else
+ max_link_bw = DP_LINK_BW_2_7;
Is this really required, i.e. do we have dp 1.1 machines in the wild
which advertise 5.4 but can't? In any case you also need to have a
IS_HSW || IS_BDW check here, since only those two platforms support
5.4 GHz.
I've not seen a case where a 1.1a capable device advertises HBR2,
no. I *have* seen the case where the sink reports that it only
supports RBR (1.62Ghz) but is in fact capable of 2.7Ghz. This is
more of a safety measure to eliminate potential training problems,
but is not strictly necessary to support HBR2. It does need the
IS_HSW || IS_BDW though, so I'll fix that and resend.
Can we make it IS_HSW || INTEL_INFO(dev)->gen >= 8, we can't quite
predict the future but new platforms supporting what old platforms do
support is a bet we take elsewere.
Sounds like a better solution. I should have that integrated shortly.
-T
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