On Thu, 19 Dec 2013 11:54:52 -0200 Paulo Zanoni <przanoni@xxxxxxxxx> wrote: > From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > We'll need this when we merge PC8 and Runtime PM: the PC8 > enable/disable functions need that lock. > > Also, it's good practice to not hold a lock for longer than strictly > needed. > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 430eb3e..1cdc5dd 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -1414,7 +1414,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused) > struct drm_info_node *node = (struct drm_info_node *) m->private; > struct drm_device *dev = node->minor->dev; > drm_i915_private_t *dev_priv = dev->dev_private; > - int ret; > + int ret = 0; > int gpu_freq, ia_freq; > > if (!(IS_GEN6(dev) || IS_GEN7(dev))) { > @@ -1422,12 +1422,13 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused) > return 0; > } > > + intel_runtime_pm_get(dev_priv); > + > flush_delayed_work(&dev_priv->rps.delayed_resume_work); > > ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock); > if (ret) > - return ret; > - intel_runtime_pm_get(dev_priv); > + goto out; > > seq_puts(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n"); > > @@ -1444,10 +1445,11 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused) > ((ia_freq >> 8) & 0xff) * 100); > } > > - intel_runtime_pm_put(dev_priv); > mutex_unlock(&dev_priv->rps.hw_lock); > > - return 0; > +out: > + intel_runtime_pm_put(dev_priv); > + return ret; > } > > static int i915_gfxec(struct seq_file *m, void *unused) So we have these runtime_pm_get/put calls all over now. Is the plan to convert those to specific wells as we add support for new platforms so we can have fine grained well control rather than just global control? I guess I need to dig out Imre's latest stuff and check... _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx