On Mon, Dec 16, 2013 at 11:38:38PM +0200, Imre Deak wrote: > On Thu, 2013-12-05 at 15:51 +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > > Back on the watermark horse. This series moves ILK/SNB/IVB over to the HSW > > watermark code. > > > > This series still has some underrun issues since the safe watermark > > update mechanism is yet to be introduced. However it shouldn't really > > be any worse than what we have ATM, and I'd like to have all the platforms > > converted so that we have more systems that will excercise the new update > > mechanism when it arrives. > > Looks ok to me. I have a couple of bikesheds inlined, regardless of > those on the series: Yeah, that looks like good cleanups on top, but since Ville is already on vacation I've decided to pull the patches in already. -Daniel > Reviewed-by: Imre Deak <imre.deak@xxxxxxxxx> > > > > > Ville Syrjälä (14): > > drm/i915: Add IVB DDB partitioning control > > drm/i915: Add ILK/SNB/IVB WM latency field support > > drm/i915: Avoid computing invalid WM levels when sprites/scaling is enabled > > Revert "drm/i915/sprite: Always enable the scaler on IronLake" > > drm/i915: Fix LP1 sprite watermarks for ILK/SNB > > drm/i915: Fix LP1+ watermark disabling ILK > > drm/i915: Don't merge LP1+ watermarks on ILK/SNB/IVB when multiple pipes are enabled > > drm/i915: Disable FBC WM on ILK, and disable LP2+ when FBC is enabled > > drm/i915: Linetime watermarks are a HSW feature > > drm/i915: Disable LP1+ watermarks safely in init > > drm/i915: Move ILK/SNB/IVB over to the HSW WM code > > drm/i915: Try to fix the messy IVB sprite scaling workaround > > drm/i915: Don't disable primary when color keying is used > > drm/i915: Avoid underruns when disabling sprites > > > > drivers/gpu/drm/i915/i915_drv.h | 1 - > > drivers/gpu/drm/i915/i915_reg.h | 2 + > > drivers/gpu/drm/i915/intel_display.c | 2 +- > > drivers/gpu/drm/i915/intel_pm.c | 857 +++++++---------------------------- > > drivers/gpu/drm/i915/intel_sprite.c | 50 +- > > 5 files changed, 195 insertions(+), 717 deletions(-) > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
