On Fri, Nov 29, 2013 at 11:53:44AM +0000, S, Deepak wrote: > Sure Chris, I will recheck the spec and change the commit accordingly. I guess the big question is why vlv is special. We've had these 20 fifo entries ever since gen6, so I'd also really like to know what suddenly changed. Even the 20 entries have just been copied from a spec with no explation. So if this is to allow hw writes to the gt from the display, then I guess we would need this change on all gen6+ platforms? Hence digging through specs or dragging a hw engineer into this discussion would be highly appreciated. Thanks, Daniel > > -----Original Message----- > From: Chris Wilson [mailto:chris@xxxxxxxxxxxxxxxxxx] > Sent: Friday, November 29, 2013 5:07 PM > To: S, Deepak > Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: Re: [PATCH v2] drm/i915/vlv: Update Wait for FIFO and wait for 20 free entries. v2 > > On Fri, Nov 29, 2013 at 11:22:32AM +0000, S, Deepak wrote: > > Hi Chris, > > > > In VLV, both hardware and software can use the write fifo in parallel, we are adding this change as a water mark to make sure we atleast have 20 free entries .This will help us to avoid software mmio write being dropped. > > Please think some more and describe the change exactly. > -Chris > > -- > Chris Wilson, Intel Open Source Technology Centre > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
