From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
The only thing between the current intel_bw_check_sagv_mask() call
site and intel_bw_atomic_check() is skl_wm_add_affected_planes()
which no longer depends on the sagv mask, so we can make life
a lot less confusing by calling intel_bw_check_sagv_mask() from
intel_bw_atomic_check() instead.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_bw.c | 9 ++++++++-
drivers/gpu/drm/i915/display/intel_bw.h | 1 -
drivers/gpu/drm/i915/display/skl_watermark.c | 5 -----
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 33ec9f574716..a39b75640b03 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -1408,7 +1408,7 @@ int intel_bw_modeset_checks(struct intel_atomic_state *state)
return 0;
}
-int intel_bw_check_sagv_mask(struct intel_atomic_state *state)
+static int intel_bw_check_sagv_mask(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
struct drm_i915_private *i915 = to_i915(display->drm);
@@ -1456,6 +1456,13 @@ int intel_bw_atomic_check(struct intel_atomic_state *state)
const struct intel_bw_state *old_bw_state;
int ret;
+ if (DISPLAY_VER(i915) < 9)
+ return 0;
+
+ ret = intel_bw_check_sagv_mask(state);
+ if (ret)
+ return ret;
+
/* FIXME earlier gens need some checks too */
if (DISPLAY_VER(i915) < 11)
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_bw.h b/drivers/gpu/drm/i915/display/intel_bw.h
index e5a0ff630438..0efc9858faa1 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.h
+++ b/drivers/gpu/drm/i915/display/intel_bw.h
@@ -68,7 +68,6 @@ intel_atomic_get_bw_state(struct intel_atomic_state *state);
void intel_bw_init_hw(struct drm_i915_private *dev_priv);
int intel_bw_init(struct drm_i915_private *dev_priv);
int intel_bw_modeset_checks(struct intel_atomic_state *state);
-int intel_bw_check_sagv_mask(struct intel_atomic_state *state);
int intel_bw_atomic_check(struct intel_atomic_state *state);
int icl_pcode_restrict_qgv_points(struct drm_i915_private *dev_priv,
u32 points_mask);
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 80ee9f8ae230..019eda6e3708 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -451,7 +451,6 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
struct drm_i915_private *i915 = to_i915(state->base.dev);
- int ret;
struct intel_crtc *crtc;
struct intel_crtc_state *new_crtc_state;
int i;
@@ -482,10 +481,6 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state)
intel_crtc_can_enable_sagv(new_crtc_state);
}
- ret = intel_bw_check_sagv_mask(state);
- if (ret)
- return ret;
-
return 0;
}
--
2.45.3
