The ALPM_CTL can be updated from different context, so
add mutex to sychonize the update.
Signed-off-by: Animesh Manna <animesh.manna@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_alpm.c | 19 +++++++++++++++++--
drivers/gpu/drm/i915/display/intel_alpm.h | 6 ++++--
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
5 files changed, 24 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index c3d13d93c779..a233f86c708e 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -23,7 +23,7 @@ bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp)
return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP;
}
-void intel_alpm_init_dpcd(struct intel_dp *intel_dp)
+void intel_alpm_init(struct intel_dp *intel_dp)
{
u8 dpcd;
@@ -31,6 +31,7 @@ void intel_alpm_init_dpcd(struct intel_dp *intel_dp)
return;
intel_dp->alpm_dpcd = dpcd;
+ mutex_init(&intel_dp->alpm_parameters.lock);
}
/*
@@ -315,15 +316,19 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
(first_sdp_position + waketime_in_lines);
}
-void intel_alpm_lobf_update(const struct intel_crtc_state *crtc_state)
+void intel_alpm_lobf_update(const struct intel_crtc_state *crtc_state,
+ struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(crtc_state);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
u32 alpm_ctl;
if (DISPLAY_VER(display) < 20)
return;
+ mutex_lock(&intel_dp->alpm_parameters.lock);
+
if (!crtc_state->has_lobf) {
alpm_ctl = intel_de_read(display, ALPM_CTL(display, cpu_transcoder));
if (alpm_ctl & ALPM_CTL_LOBF_ENABLE) {
@@ -331,6 +336,8 @@ void intel_alpm_lobf_update(const struct intel_crtc_state *crtc_state)
intel_de_write(display, ALPM_CTL(display, cpu_transcoder), alpm_ctl);
}
}
+
+ mutex_unlock(&intel_dp->alpm_parameters.lock);
}
static void lnl_alpm_configure(struct intel_dp *intel_dp,
@@ -345,6 +352,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
(!intel_dp->psr.sel_update_enabled && !intel_dp_is_edp(intel_dp)))
return;
+ mutex_lock(&intel_dp->alpm_parameters.lock);
+
/*
* Panel Replay on eDP is always using ALPM aux less. I.e. no need to
* check panel support at this point.
@@ -384,6 +393,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
alpm_ctl |= ALPM_CTL_ALPM_ENTRY_CHECK(intel_dp->alpm_parameters.check_entry_lines);
intel_de_write(display, ALPM_CTL(display, cpu_transcoder), alpm_ctl);
+
+ mutex_unlock(&intel_dp->alpm_parameters.lock);
}
void intel_alpm_configure(struct intel_dp *intel_dp,
@@ -504,6 +515,8 @@ void intel_alpm_disable(struct intel_dp *intel_dp)
if (DISPLAY_VER(display) < 20)
return;
+ mutex_lock(&intel_dp->alpm_parameters.lock);
+
intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE |
ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
@@ -511,6 +524,8 @@ void intel_alpm_disable(struct intel_dp *intel_dp)
intel_de_rmw(display,
PORT_ALPM_CTL(cpu_transcoder),
PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
+
+ mutex_unlock(&intel_dp->alpm_parameters.lock);
}
bool intel_alpm_get_error(struct intel_dp *intel_dp)
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
index 22469fd4cba5..f7834343a9bd 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.h
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -14,8 +14,9 @@ struct drm_connector_state;
struct intel_connector;
struct intel_atomic_state;
struct intel_crtc;
+struct intel_encoder;
-void intel_alpm_init_dpcd(struct intel_dp *intel_dp);
+void intel_alpm_init(struct intel_dp *intel_dp);
bool intel_alpm_compute_params(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
@@ -23,7 +24,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
struct drm_connector_state *conn_state);
void intel_alpm_configure(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
-void intel_alpm_lobf_update(const struct intel_crtc_state *crtc_state);
+void intel_alpm_lobf_update(const struct intel_crtc_state *crtc_state,
+ struct intel_encoder *encoder);
void intel_alpm_post_plane_update(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_alpm_lobf_debugfs_add(struct intel_connector *connector);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index b6186e1cf804..a3c488aab730 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3620,7 +3620,7 @@ static void intel_ddi_update_pipe_dp(struct intel_atomic_state *state,
intel_ddi_set_dp_msa(crtc_state, conn_state);
intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
- intel_alpm_lobf_update(crtc_state);
+ intel_alpm_lobf_update(crtc_state, encoder);
intel_backlight_update(state, encoder, crtc_state, conn_state);
drm_connector_update_privacy_screen(conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index b6ec9a8fadd9..65875404e20d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1802,6 +1802,7 @@ struct intel_dp {
u8 io_wake_lines;
u8 fast_wake_lines;
enum transcoder transcoder;
+ struct mutex lock;
/* LNL and beyond */
u8 check_entry_lines;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3aa3c4ab97d1..201a2ab30d83 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6363,7 +6363,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
*/
intel_hpd_enable_detection(encoder);
- intel_alpm_init_dpcd(intel_dp);
+ intel_alpm_init(intel_dp);
/* Cache DPCD and EDID for edp. */
has_dpcd = intel_edp_init_dpcd(intel_dp, connector);
--
2.29.0
