Hi, On Thu, 27 Feb 2025, Gustavo Sousa wrote: > In Xe3_LPD, display audio has the core audio logic located in PG0 and > per-transcoder logic in the same power well that provides power for the > transcoder [1]. [...] > Since intel_audio_component_get_power() uses > POWER_DOMAIN_AUDIO_PLAYBACK, make sure to map that power domain to > DC_off power well, so that we disable dynamic DC states (which includes > DC6) while the audio driver needs display audio power. [...] > +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c > @@ -1694,6 +1694,7 @@ I915_DECL_PW_DOMAINS(xe3lpd_pwdoms_dc_off, > XE3LPD_PW_C_POWER_DOMAINS, > XE3LPD_PW_D_POWER_DOMAINS, > POWER_DOMAIN_AUDIO_MMIO, > + POWER_DOMAIN_AUDIO_PLAYBACK, > POWER_DOMAIN_INIT); ack, this looks good and covers audio expectations for drm_audio_component.h usage: Reviewed-by: Kai Vehmanen <kai.vehmanen@xxxxxxxxxxxxxxx> Br, Kai
