When determining the GT command streamer frequency, there are two approaches used by i915 and Xe: - Derive the CS frequency from the crystal clock frequency register (or a per-platform hardcoded value). This is supposed to be the method usually used (and the only method supported at all for Xe2 and later hardware). - Set the CS frequency to exactly the display refclk frequency. This is supposedly a rare case, and is used only when a setting in CTC_MODE[0] indicates we should use this approach. There's little/no documentation in the hardware specs about these approaches (i.e., the display refclk approach is simply referred to as "Broadwell Divide Logic" with no further explanation). It seems most of the logic here was originally inherited from the Windows driver a long time ago and we've just been carrying it forward ever since. Currently the second approach (use of display reference clock) is accomplished by reading a display debug register (TIMESTAMP_OVERRIDE). Given that the display code already has more straightforward logic for determining display reference clock (either from strap registers, or from a per-platform constant in cases where there's only one possible value), it makes sense to just call the display code to get the frequency rather than doing direct access to the display hardware inside the GT driver. Matt Roper (4): drm/i915/display: Make refclk fetching logic reusable drm/i915/gt: Replace TIMESTAMP_OVERRIDE readout drm/xe: Drop usage of TIMESTAMP_OVERRIDE drm/xe/sriov: Drop TIMESTAMP_OVERRIDE from Xe2 runtime regs drivers/gpu/drm/i915/display/intel_cdclk.c | 44 ++++++++++++------- drivers/gpu/drm/i915/display/intel_cdclk.h | 1 + .../gpu/drm/i915/gt/intel_gt_clock_utils.c | 31 ++++--------- drivers/gpu/drm/xe/display/xe_display.c | 6 +++ drivers/gpu/drm/xe/display/xe_display.h | 4 ++ drivers/gpu/drm/xe/xe_gt_clock.c | 28 ++++-------- drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c | 1 - 7 files changed, 56 insertions(+), 59 deletions(-) -- 2.48.1
