On Wed, Feb 19, 2025 at 06:23:01PM +0530, Nautiyal, Ankit K wrote: > > On 2/17/2025 11:44 PM, Ville Syrjälä wrote: > > On Fri, Feb 14, 2025 at 05:41:18PM +0530, Ankit Nautiyal wrote: > >> Currently we do not support VRR with HDMI so skip vrr compute > >> config step for DP with HDMI sink. > >> > >> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx> > >> --- > >> drivers/gpu/drm/i915/display/intel_dp.c | 8 +++++++- > >> 1 file changed, 7 insertions(+), 1 deletion(-) > >> > >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > >> index 9ed7d46143e9..bdf53d255d91 100644 > >> --- a/drivers/gpu/drm/i915/display/intel_dp.c > >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c > >> @@ -3199,7 +3199,13 @@ intel_dp_compute_config(struct intel_encoder *encoder, > >> if (pipe_config->splitter.enable) > >> pipe_config->dp_m_n.data_m *= pipe_config->splitter.link_count; > >> > >> - intel_vrr_compute_config(pipe_config, conn_state); > >> + /* > >> + * VRR via PCON is currently unsupported. > >> + * TODO: Add support for VRR for DP HDMI2.1 PCON. > >> + */ > >> + if (!intel_dp_has_hdmi_sink(intel_dp)) > >> + intel_vrr_compute_config(pipe_config, conn_state); > > I thought the AS SDP was pretty much for this, but I guess > > we're missing somehting else still? > > For PCON AS_SDP with the required fields is fine, but still some work > remains like parsing HFVSDB fields for VRR capabilities for HDMI2.1. > > However this doesnt seem to be the correct place to handle this, as we > still need to use fixed timings when PCON with HDMI2.1 panel. Right, so this should rather be checked in intel_vrr_is_capable(). > > I will drop this patch for now. > > > Regards, > > Ankit > > > > > >> + > >> intel_dp_compute_as_sdp(intel_dp, pipe_config); > >> intel_psr_compute_config(intel_dp, pipe_config, conn_state); > >> intel_alpm_lobf_compute_config(intel_dp, pipe_config, conn_state); > >> -- > >> 2.45.2 -- Ville Syrjälä Intel
