> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Jani
> Nikula
> Sent: Wednesday, February 12, 2025 10:07 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; intel-xe@xxxxxxxxxxxxxxxxxxxxx
> Cc: Nikula, Jani <jani.nikula@xxxxxxxxx>
> Subject: [PATCH 03/14] drm/i915/ips: convert hsw_ips.c to struct
> intel_display
>
> Going forward, struct intel_display is the main display device data pointer.
> Convert as much as possible of hsw_ips.c to struct intel_display.
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/hsw_ips.c | 26 ++++++++++++--------------
> 1 file changed, 12 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c
> b/drivers/gpu/drm/i915/display/hsw_ips.c
> index d02c328bf902..674a0e5f0858 100644
> --- a/drivers/gpu/drm/i915/display/hsw_ips.c
> +++ b/drivers/gpu/drm/i915/display/hsw_ips.c
> @@ -36,7 +36,7 @@ static void hsw_ips_enable(const struct intel_crtc_state
> *crtc_state)
> if (display->ips.false_color)
> val |= IPS_FALSE_COLOR;
>
> - if (IS_BROADWELL(i915)) {
> + if (display->platform.broadwell) {
> drm_WARN_ON(display->drm,
> snb_pcode_write(&i915->uncore,
> DISPLAY_IPS_CONTROL,
> val | IPS_PCODE_CONTROL));
> @@ -71,7 +71,7 @@ bool hsw_ips_disable(const struct intel_crtc_state
> *crtc_state)
> if (!crtc_state->ips_enabled)
> return need_vblank_wait;
>
> - if (IS_BROADWELL(i915)) {
> + if (display->platform.broadwell) {
> drm_WARN_ON(display->drm,
> snb_pcode_write(&i915->uncore,
> DISPLAY_IPS_CONTROL, 0));
> /*
> @@ -96,7 +96,7 @@ bool hsw_ips_disable(const struct intel_crtc_state
> *crtc_state) static bool hsw_ips_need_disable(struct intel_atomic_state
> *state,
> struct intel_crtc *crtc)
> {
> - struct drm_i915_private *i915 = to_i915(state->base.dev);
> + struct intel_display *display = to_intel_display(state);
> const struct intel_crtc_state *old_crtc_state =
> intel_atomic_get_old_crtc_state(state, crtc);
> const struct intel_crtc_state *new_crtc_state = @@ -114,7 +114,7
> @@ static bool hsw_ips_need_disable(struct intel_atomic_state *state,
> *
> * Disable IPS before we program the LUT.
> */
> - if (IS_HASWELL(i915) &&
> + if (display->platform.haswell &&
> intel_crtc_needs_color_update(new_crtc_state) &&
> new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)
> return true;
> @@ -137,7 +137,7 @@ bool hsw_ips_pre_update(struct intel_atomic_state
> *state, static bool hsw_ips_need_enable(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> - struct drm_i915_private *i915 = to_i915(state->base.dev);
> + struct intel_display *display = to_intel_display(state);
> const struct intel_crtc_state *old_crtc_state =
> intel_atomic_get_old_crtc_state(state, crtc);
> const struct intel_crtc_state *new_crtc_state = @@ -155,7 +155,7
> @@ static bool hsw_ips_need_enable(struct intel_atomic_state *state,
> *
> * Re-enable IPS after the LUT has been programmed.
> */
> - if (IS_HASWELL(i915) &&
> + if (display->platform.haswell &&
> intel_crtc_needs_color_update(new_crtc_state) &&
> new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)
> return true;
> @@ -194,7 +194,6 @@ static bool hsw_crtc_state_ips_capable(const struct
> intel_crtc_state *crtc_state {
> struct intel_display *display = to_intel_display(crtc_state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>
> /* IPS only exists on ULT machines and is tied to pipe A. */
> if (!hsw_crtc_supports_ips(crtc))
> @@ -213,7 +212,7 @@ static bool hsw_crtc_state_ips_capable(const struct
> intel_crtc_state *crtc_state
> *
> * Should measure whether using a lower cdclk w/o IPS
> */
> - if (IS_BROADWELL(i915) &&
> + if (display->platform.broadwell &&
> crtc_state->pixel_rate > display->cdclk.max_cdclk_freq * 95 / 100)
> return false;
>
> @@ -222,9 +221,9 @@ static bool hsw_crtc_state_ips_capable(const struct
> intel_crtc_state *crtc_state
>
> int hsw_ips_min_cdclk(const struct intel_crtc_state *crtc_state) {
> - struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
> + struct intel_display *display = to_intel_display(crtc_state);
>
> - if (!IS_BROADWELL(i915))
> + if (!display->platform.broadwell)
> return 0;
>
> if (!hsw_crtc_state_ips_capable(crtc_state))
> @@ -237,7 +236,7 @@ int hsw_ips_min_cdclk(const struct intel_crtc_state
> *crtc_state) int hsw_ips_compute_config(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> - struct drm_i915_private *i915 = to_i915(state->base.dev);
> + struct intel_display *display = to_intel_display(state);
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
>
> @@ -259,7 +258,7 @@ int hsw_ips_compute_config(struct
> intel_atomic_state *state,
> if (!(crtc_state->active_planes & ~BIT(PLANE_CURSOR)))
> return 0;
>
> - if (IS_BROADWELL(i915)) {
> + if (display->platform.broadwell) {
> const struct intel_cdclk_state *cdclk_state;
>
> cdclk_state = intel_atomic_get_cdclk_state(state);
> @@ -280,12 +279,11 @@ void hsw_ips_get_config(struct intel_crtc_state
> *crtc_state) {
> struct intel_display *display = to_intel_display(crtc_state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>
> if (!hsw_crtc_supports_ips(crtc))
> return;
>
> - if (IS_HASWELL(i915)) {
> + if (display->platform.haswell) {
> crtc_state->ips_enabled = intel_de_read(display, IPS_CTL) &
> IPS_ENABLE;
> } else {
> /*
> --
> 2.39.5
