> -----Original Message----- > From: Nikula, Jani <jani.nikula@xxxxxxxxx> > Sent: Wednesday, February 12, 2025 3:09 PM > To: Kandpal, Suraj <suraj.kandpal@xxxxxxxxx>; intel- > gfx@xxxxxxxxxxxxxxxxxxxxx; intel-xe@xxxxxxxxxxxxxxxxxxxxx > Cc: ville.syrjala@xxxxxxxxxxxxxxx; Deak, Imre <imre.deak@xxxxxxxxx> > Subject: RE: [PATCH 1/3] drm/i915/reg: use REG_BIT and friends to define DP > registers > > On Wed, 12 Feb 2025, "Kandpal, Suraj" <suraj.kandpal@xxxxxxxxx> wrote: > >> diff --git a/drivers/gpu/drm/i915/i915_reg.h > >> b/drivers/gpu/drm/i915/i915_reg.h index 670cd2371f94..da658c3591f0 > >> 100644 > >> --- a/drivers/gpu/drm/i915/i915_reg.h > >> +++ b/drivers/gpu/drm/i915/i915_reg.h > >> @@ -1394,88 +1394,50 @@ > >> #define VLV_DP_B _MMIO(VLV_DISPLAY_BASE + 0x64100) > >> #define VLV_DP_C _MMIO(VLV_DISPLAY_BASE + 0x64200) > >> #define CHV_DP_D _MMIO(VLV_DISPLAY_BASE + 0x64300) > >> -#define DP_PORT_EN (1 << 31) > >> -#define DP_PIPE_SEL_SHIFT 30 > >> -#define DP_PIPE_SEL_MASK (1 << 30) > >> -#define DP_PIPE_SEL(pipe) ((pipe) << 30) > >> -#define DP_PIPE_SEL_SHIFT_IVB 29 > >> -#define DP_PIPE_SEL_MASK_IVB (3 << 29) > >> -#define DP_PIPE_SEL_IVB(pipe) ((pipe) << 29) > >> +#define DP_PORT_EN REG_BIT(31) > >> +#define DP_PIPE_SEL_MASK REG_GENMASK(30, 30) > > > > Why not use REG_BIT() here REG_GENMASK for a single bit seems wrong > > ...because defining a MASK with BIT feels wrong to me. :) > Well in that case LGTM, Reviewed-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx> > > BR, > Jani. > > > -- > Jani Nikula, Intel
