> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Jani > Nikula > Sent: Friday, February 7, 2025 3:48 PM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; intel-xe@xxxxxxxxxxxxxxxxxxxxx > Cc: Nikula, Jani <jani.nikula@xxxxxxxxx> > Subject: [PATCH 2/3] drm/i915/pch: Hide PCH device IDs > > Only the PCH identification code needs the PCH device IDs, as all the PCH > checks are now based on PCH type. Hide the PCH device IDs inside > intel_pch.c. Remove the unused INTEL_PCH_ID() macro while at it. > > Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> LGTM, Reviewed-by: Nemesa Garg <nemesa.garg@xxxxxxxxx> > --- > drivers/gpu/drm/i915/soc/intel_pch.c | 30 +++++++++++++++++++++++++++ > drivers/gpu/drm/i915/soc/intel_pch.h | 31 ---------------------------- > 2 files changed, 30 insertions(+), 31 deletions(-) > > diff --git a/drivers/gpu/drm/i915/soc/intel_pch.c > b/drivers/gpu/drm/i915/soc/intel_pch.c > index 0370ccb6943c..fa03b5068a19 100644 > --- a/drivers/gpu/drm/i915/soc/intel_pch.c > +++ b/drivers/gpu/drm/i915/soc/intel_pch.c > @@ -7,6 +7,36 @@ > #include "i915_utils.h" > #include "intel_pch.h" > > +#define INTEL_PCH_DEVICE_ID_MASK 0xff80 > +#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 > +#define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00 > +#define INTEL_PCH_PPT_DEVICE_ID_TYPE 0x1e00 > +#define INTEL_PCH_LPT_DEVICE_ID_TYPE 0x8c00 > +#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE 0x9c00 > +#define INTEL_PCH_WPT_DEVICE_ID_TYPE 0x8c80 > +#define INTEL_PCH_WPT_LP_DEVICE_ID_TYPE 0x9c80 > +#define INTEL_PCH_SPT_DEVICE_ID_TYPE 0xA100 > +#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE 0x9D00 > +#define INTEL_PCH_KBP_DEVICE_ID_TYPE 0xA280 > +#define INTEL_PCH_CNP_DEVICE_ID_TYPE 0xA300 > +#define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE 0x9D80 > +#define INTEL_PCH_CMP_DEVICE_ID_TYPE 0x0280 > +#define INTEL_PCH_CMP2_DEVICE_ID_TYPE 0x0680 > +#define INTEL_PCH_CMP_V_DEVICE_ID_TYPE 0xA380 > +#define INTEL_PCH_ICP_DEVICE_ID_TYPE 0x3480 > +#define INTEL_PCH_ICP2_DEVICE_ID_TYPE 0x3880 > +#define INTEL_PCH_MCC_DEVICE_ID_TYPE 0x4B00 > +#define INTEL_PCH_TGP_DEVICE_ID_TYPE 0xA080 > +#define INTEL_PCH_TGP2_DEVICE_ID_TYPE 0x4380 > +#define INTEL_PCH_JSP_DEVICE_ID_TYPE 0x4D80 > +#define INTEL_PCH_ADP_DEVICE_ID_TYPE 0x7A80 > +#define INTEL_PCH_ADP2_DEVICE_ID_TYPE 0x5180 > +#define INTEL_PCH_ADP3_DEVICE_ID_TYPE 0x7A00 > +#define INTEL_PCH_ADP4_DEVICE_ID_TYPE 0x5480 > +#define INTEL_PCH_P2X_DEVICE_ID_TYPE 0x7100 > +#define INTEL_PCH_P3X_DEVICE_ID_TYPE 0x7000 > +#define INTEL_PCH_QEMU_DEVICE_ID_TYPE 0x2900 /* qemu q35 > has 2918 */ > + > /* Map PCH device id to PCH type, or PCH_NONE if unknown. */ static enum > intel_pch intel_pch_type(const struct drm_i915_private *dev_priv, unsigned > short id) diff --git a/drivers/gpu/drm/i915/soc/intel_pch.h > b/drivers/gpu/drm/i915/soc/intel_pch.h > index bc926df14c45..635aea7a5539 100644 > --- a/drivers/gpu/drm/i915/soc/intel_pch.h > +++ b/drivers/gpu/drm/i915/soc/intel_pch.h > @@ -34,38 +34,7 @@ enum intel_pch { > PCH_LNL, > }; > > -#define INTEL_PCH_DEVICE_ID_MASK 0xff80 > -#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 > -#define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00 > -#define INTEL_PCH_PPT_DEVICE_ID_TYPE 0x1e00 > -#define INTEL_PCH_LPT_DEVICE_ID_TYPE 0x8c00 > -#define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE 0x9c00 > -#define INTEL_PCH_WPT_DEVICE_ID_TYPE 0x8c80 > -#define INTEL_PCH_WPT_LP_DEVICE_ID_TYPE 0x9c80 > -#define INTEL_PCH_SPT_DEVICE_ID_TYPE 0xA100 > -#define INTEL_PCH_SPT_LP_DEVICE_ID_TYPE 0x9D00 > -#define INTEL_PCH_KBP_DEVICE_ID_TYPE 0xA280 > -#define INTEL_PCH_CNP_DEVICE_ID_TYPE 0xA300 > -#define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE 0x9D80 > -#define INTEL_PCH_CMP_DEVICE_ID_TYPE 0x0280 > -#define INTEL_PCH_CMP2_DEVICE_ID_TYPE 0x0680 > -#define INTEL_PCH_CMP_V_DEVICE_ID_TYPE 0xA380 > -#define INTEL_PCH_ICP_DEVICE_ID_TYPE 0x3480 > -#define INTEL_PCH_ICP2_DEVICE_ID_TYPE 0x3880 > -#define INTEL_PCH_MCC_DEVICE_ID_TYPE 0x4B00 > -#define INTEL_PCH_TGP_DEVICE_ID_TYPE 0xA080 > -#define INTEL_PCH_TGP2_DEVICE_ID_TYPE 0x4380 > -#define INTEL_PCH_JSP_DEVICE_ID_TYPE 0x4D80 > -#define INTEL_PCH_ADP_DEVICE_ID_TYPE 0x7A80 > -#define INTEL_PCH_ADP2_DEVICE_ID_TYPE 0x5180 > -#define INTEL_PCH_ADP3_DEVICE_ID_TYPE 0x7A00 > -#define INTEL_PCH_ADP4_DEVICE_ID_TYPE 0x5480 > -#define INTEL_PCH_P2X_DEVICE_ID_TYPE 0x7100 > -#define INTEL_PCH_P3X_DEVICE_ID_TYPE 0x7000 > -#define INTEL_PCH_QEMU_DEVICE_ID_TYPE 0x2900 /* qemu q35 > has 2918 */ > - > #define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type) > -#define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id) > #define HAS_PCH_DG2(dev_priv) > (INTEL_PCH_TYPE(dev_priv) == PCH_DG2) > #define HAS_PCH_ADP(dev_priv) > (INTEL_PCH_TYPE(dev_priv) == PCH_ADP) > #define HAS_PCH_DG1(dev_priv) > (INTEL_PCH_TYPE(dev_priv) == PCH_DG1) > -- > 2.39.5