> -----Original Message-----
> From: Deak, Imre <imre.deak@xxxxxxxxx>
> Sent: Thursday, February 6, 2025 10:16 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; intel-xe@xxxxxxxxxxxxxxxxxxxxx
> Cc: Murthy, Arun R <arun.r.murthy@xxxxxxxxx>; Kandpal, Suraj
> <suraj.kandpal@xxxxxxxxx>
> Subject: [PATCH] drm/i915/dp_mst: Fix disabling the minimum HBlank time
>
> Disable the minimum HBlank time only on LNL+, where this functionality and
> corresponding register exists.
>
Maybe Bspec: 74379 here
Otherwise LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx>
> Fixes: a5ebe00c2ace ("drm/i915/dp: Guarantee a minimum HBlank time")
> Cc: Arun R Murthy <arun.r.murthy@xxxxxxxxx>
> Cc: Suraj Kandpal <suraj.kandpal@xxxxxxxxx>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index ae2db983eff92..459440dd6e879 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -1006,7 +1006,8 @@ static void mst_stream_disable(struct
> intel_atomic_state *state,
>
> intel_dp_sink_disable_decompression(state, connector,
> old_crtc_state);
>
> - intel_de_write(display, DP_MIN_HBLANK_CTL(trans), 0x00);
> + if (DISPLAY_VER(display) >= 20)
> + intel_de_write(display, DP_MIN_HBLANK_CTL(trans), 0);
> }
>
> static void mst_stream_post_disable(struct intel_atomic_state *state,
> --
> 2.44.2
