From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Currently we just print a hardware specific bitmask when
encountering any kind of display fault error. To make these
errors a bit easier to decode (and perhps even analyze)
I now decode the actual bits, and for plane faults provide
a dump of a few (hopefully) relevant plane registers (CTL,
SURF,SURFLIVE for now, which should at least help with faults
cause by bad GTT alignment).
So far we only reported faults on bdw+, but I'm also hooking
this stuff up for all ilk+ and vlv/chv. The older gmch
platforms I left out for now, but I think i965/g4x should
at least be diable in the future.
Not sure I'm 100% satisfied with how the pipe_fault_handler
thing is structured, but at least it works.
Ville Syrjälä (8):
drm/i915: Add missing else to the if ladder in missing else
drm/i915: Introduce a minimal plane error state
drm/i915: Pimp display fault reporting
drm/i915: Hook in display GTT faults for IVB/HSW
drm/i915: Hook in display GTT faults for ILK/SNB
drm/i915: Introduce i915_error_regs
drm/i915: Un-invert {i9xx,i965}_error_mask()
drm/i915: Hook up display fault interrupts for VLV/CHV
drivers/gpu/drm/i915/display/i9xx_plane.c | 41 ++
.../gpu/drm/i915/display/intel_atomic_plane.c | 2 +-
.../gpu/drm/i915/display/intel_atomic_plane.h | 2 +
drivers/gpu/drm/i915/display/intel_cursor.c | 26 ++
.../gpu/drm/i915/display/intel_display_irq.c | 392 +++++++++++++++++-
.../gpu/drm/i915/display/intel_display_irq.h | 3 +
.../drm/i915/display/intel_display_types.h | 7 +
drivers/gpu/drm/i915/display/intel_sprite.c | 36 ++
.../drm/i915/display/skl_universal_plane.c | 12 +
drivers/gpu/drm/i915/i915_irq.c | 61 ++-
drivers/gpu/drm/i915/i915_irq.h | 4 +
drivers/gpu/drm/i915/i915_reg.h | 34 ++
drivers/gpu/drm/i915/i915_reg_defs.h | 8 +
drivers/gpu/drm/xe/display/ext/i915_irq.c | 23 +
14 files changed, 632 insertions(+), 19 deletions(-)
--
2.45.2
